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Region 9 Outstanding Student Paper Award Committee

  • Region 9 Outstanding Student Paper Award Committee Chair

    • Jacobus W. Swart
       - Senior Member
      Jacobus W.  Swart portrait placeholder
      FEEC/UNICAMP - State University of Campinas
      Av. Albert Einstein 400
      Campinas, Sao Paul 13.083-970
      Brazil
      Phone 1:
      +55 19 3746 6001

      Lecture Topics: MEMS, sensors, ISFET, CNT and graphene, Advanced CMOS processes
  • Region 9 Outstanding Student Paper Award Committee Members

    • Edmundo A. Gutiérrez-D.
       - Senior Member
      Edmundo A. Gutiérrez-D. portrait
      Solid State Phenomena; Emerging Technology and Devices
      INAOE
      L. E. Erro Nr. 1
      Tonantzintla, Puebla 72840
      Mexico
      Phone 1:
      +52 222 247 0517

      Fax:
      +52 222 247 0517
      Lecture Topics:  Magneto-quantum conductance effects in mosfets and nano-scaled semiconductor devices, low-temperature electronics, and magnetic sensors.

       Theoretical and experimental research on particle-wave duality conductance properties in semiconductor devices, DC and RF/Power device degradation and circuit reliability.

      Dr. Edmundo A. Gutiérrez-D. got his PhD in 1993 from the Catholic University of Leuven, Belgium with the thesis entitled “Electrical performance of submicron CMOS technologies from 300 K to 4.2 K”. From 1989 to 1993, while working for his PhD, served as a research assistant at the Interuniversity Microelectronics Center (IMEC) in Leuven, Belgium. In 1996 was guest Professor at Simon Fraser University, Vancouver, Canada. In 1996 spent two months as an invited lecturer at the Sao Paulo University, Brazil. In 2000 acted as Design Manager of the Motorola Mexico Center for Semiconductor Technology. In 2002 was invited lecturer at the Technical University of Vienna, Austria. In 2005 joined the Intel Mexico Research Center as technical Director. Currently he holds a Professor position at the National Institute for Astrophysics, Optics and Electronics (INAOE), in Puebla, Mexico. Prof. Gutiérrez-D. is an IEEE senior member since 2008.
      Professor Gutiérrez-D. has published over 100 scientific publications and conferences in the field of semiconductor device physics, has supervised 5 M.Sc. and 10 Ph.D. thesis, and is author of the book “Low Temperature Electronics, Physics, Devices, Circuits and Applications” published by Academic Press in 2000. Prof. Gutiérrez-D. is member of the Mexico National System of Researchers and technical reviewer for the Mexico National Council for Science and Technology (CONACyT).
    • Joao Martino
       - Senior Member
      Joao Martino portrait
      University of Sao Paulo
      Laboratory of Integrated Systems
      Av. Prof. Luciano Gualberto, trav.3, n.158
      San Paulo 05508-010
      Brazil
      Phone 1:
      (11) 3091-5657

      Lecture Topics: 1) SOI MOSFET: Electrical Characterization and Modeling 2) Multiple-Gate Transistors: Device Physics and Characterization 3) Single Transistor Memory Cell: 1T-DRAM 4) Tunnel FET Transistors (triple-gate and nanowire structures) 5) Radiation effects on SOI devices 6) Field Effect Transistor: From MOSFET to Tunnel FET

      Bio
      Joao Antonio Martino received master (1984) and PhD (1988) degrees in microelectronics from University of Sao Paulo, Brazil. He was a postdoctoral researcher in silicon-on-insulator (SOI) devices and technology in Imec, Belgium. He is currently a full professor and the head of SOI group at University of Sao Paulo. His expertise is in electrical characterization, simulation and modeling of SOI devices in wide temperature range. He is also interested in the SOI-CMOS fabrication process, multiple-gate devices (FinFET), 1T-DRAM, Tunnel-FET and radiation effects. He has authored or coauthored of more than 400 technical journal papers and conference presentation and author/editor of 5 books. He is senior member and distinguished lecturer of the IEEE Electron Device Society (EDS). He is chair of IEEE/EDS South Brazil chapter and vice-chair of SRC IEEE/EDS R9.
    • M.K. Radhakrishnan
       - Senior Member
      M.K.  Radhakrishnan portrait
      NanoRel Technical Consultants
      273, 18D Main, 6th Block
      Koramangla, Bangalore 560095
      India
      Phone 1:
      +91 80 25630695

      Phone 2
      +91 9447663869

      Lecture Topics: 1. Physical Analysis Challenges and Interface Physics Studies in Silicon Nano Devices 2.  Building in Reliability in Devices through Analysis and Study of Failure Mechanisms.


      Biography:  M.K. Radhakrishnan (M’82-SM’94) received B.Sc from Kerala University, India in 1972, M.Sc in Solid State electronics from Sardar Patel University, India in 1975 and Ph.Ddegree in Semiconductor Physics from Cochin University of Science and Technology in 1981.


      He is currently Directorof NanoRel Technical Consultants Singapore from 2004.  He has been with Indian Space Research Organization till 1990. From 1991-1993 he was with ST Microelectronics Singapore. From 1993 to 2001 he was with Institute of Microelectronics Singapore, where he pioneered the setting up of a full-fledged device failure analysis laboratory.  From 1994 to 2004 he served as adjunct professor at National University of Singapore. His current research interests include analysis and reliability in nano-electronic devices and interface physics studies.


      Dr. Radhakrishnan is a fellow of Institution of Electrical and Telecommunication Engineers India, member of Electron Device Failure Analysis Society (EDFAS) USA and ESD Association USA.  He served as Editor of Journal of Semiconductor Technology and Science (Korea) during 2001-2003 and is an Editorial board member of Microelectronics Reliability journal (UK). He served as Guest Editor to IEEE Transactions Devices Materials and Reliability and edited or co-edited of 4 conference proceedings.  He was Technical Chair IEEE International Symposium on Physical and Failure Analysis of ICs (IPFA) in 1995 and 1997 and General Chair of IPFA in 1999.  He was IEEEIEDST General Chair in 2009. He has been in the technical program committees of ESREF, IRPS, EPTC, MIEL, ICEE and EOS/ESD Symposium.  Currently he is the Editor-in Chief of IEEE EDS Newsletter and serves as a member of IEEE EDS Technical Committee on Electronic Materials.  He is a Distinguished Lecturer of IEEE Electron Devices Society.


       

    • Albert Z.H. Wang
       - Fellow
      Albert Z.H. Wang portrait
      University of California
      Dept. of Electrical and Computer Engineering
      Office: 417 EBU2, Lab: 227 EBU2
      Riverside, CA 92521
      USA
      Phone 1:
      +1 951 827 2555

      Fax:
      +1 951 827 2425

      Lecture Topics:


      1. ESD-RFIC co-design techniques.
      2. Mixed-mode ESD protection circuit simulation design methodology.
      3. Above-IC ESD protection by nano technology
      4. Field-programmable ESD protection by nano technology

    Region 9 Chapter Chairs