J-EDS Editor-in-Chief and Editors

We are currently in the process of selecting a world-class editorial board to edit and approve manuscripts for inclusion in the J-EDS.

If you are interested in serving as a J-EDS editor, please contact the current Editor-In-Chief Mikael Östling for more information.

If you wish to be added to the list of potential reviewers the EDS database, please contact the EDS headquarters. Kindly provide your full name, email address, and area of expertise.

Click on the names below to read each editor's biography.

J-EDS Editorial Board

  • J-EDS Editor-in-Chief

    • Mikael Östling
       - Fellow
      Mikael  Östling portrait
      KTH, Royal Institute of Technology
      Dept of Microelectronics and InfoTech
      Electrum 229
      Kista SE-164 40
      Phone 1:
      +46 8 790 4301

      +46 8 752 7850

      Mikael Östling (M’ 85- F’04) received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He is currently department head of Integrated Devices and Circuits and was the dean of the School of Information and Communication Technology, KTH, between 2004–12. Östling was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. In 2005 he co-founded the company TranSiC, acquired in full by Fairchild Semiconductor 2011. He was awarded the first ERC grant for advanced investigators. His research interests are nanoscaled Si and Ge device technologies and emerging 2D materials, as well as device technology for wide bandgap semiconductors for high power / high temperature applications. He has supervised 35 PhD theses work and co -authored about 500 scientific papers published in international journals and conferences. Mikael Östling was an editor of the IEEE Electron Device Letters 2005-2014 and appointed vice president of EDS since 2014. Mikael is a Fellow of the IEEE.

      Lecture Topics: SiC Device Technology for energy efficiency and for high temperature operation Silicon Nanoscaled Device Technology

  • J-EDS Editors

    • Mikael Östling
       - Fellow
      Mikael  Östling portrait
      KTH, Royal Institute of Technology
      Dept of Microelectronics and InfoTech
      Electrum 229
      Kista SE-164 40
      Phone 1:
      +46 8 790 4301

      +46 8 752 7850

      Mikael Östling (M’ 85- F’04) received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He is currently department head of Integrated Devices and Circuits and was the dean of the School of Information and Communication Technology, KTH, between 2004–12. Östling was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. In 2005 he co-founded the company TranSiC, acquired in full by Fairchild Semiconductor 2011. He was awarded the first ERC grant for advanced investigators. His research interests are nanoscaled Si and Ge device technologies and emerging 2D materials, as well as device technology for wide bandgap semiconductors for high power / high temperature applications. He has supervised 35 PhD theses work and co -authored about 500 scientific papers published in international journals and conferences. Mikael Östling was an editor of the IEEE Electron Device Letters 2005-2014 and appointed vice president of EDS since 2014. Mikael is a Fellow of the IEEE.

      Lecture Topics: SiC Device Technology for energy efficiency and for high temperature operation Silicon Nanoscaled Device Technology

    • David Abe
       - Dr.
      David Abe portrait
      Naval Research Laboratory
      4555 Overlook Ave. S.W.
      Washington, DC 20375
      Phone 1:


      David K. Abe (M’88–SM’12) received the B.Sc. degree in engineering from Harvey Mudd College in 1981, M.S. in electrical engineering from the University of California, Davis in 1988, and Ph.D. in electrical engineering/electrophysics from the University of Maryland in 1992. Since 1997, he has been at the U.S. Naval Research Laboratory (NRL), Washington, DC, where he directs a multidisciplinary group of scientists and engineers as head of the Electromagnetics Technology Branch. The Branch carries out research and exploratory development on radio-frequency concepts, materials, devices, components, and circuits in the frequency range of 1 MHz to approximately 1 THz with focused efforts in wide and narrow bandgap semiconductor electronics, carbon-based and other novel lower dimensional electronic materials, tunable and reconfigurable materials and circuits, control components, electron emission physics, electron beam-wave interactions (vacuum electronics), and electromagnetic theory and computational techniques. Dr. Abe’s current research involves the generation of coherent microwave and millimeter-wave radiation resulting from the interaction of axially-streaming electron beams with novel electromagnetic structures, with a particular emphasis on multiple-beam devices. Prior to NRL, Dr. Abe worked on interdisciplinary projects in pulsed power, explosive-driven magnetic flux compression, high power microwave generation, and electromagnetic effects at the Lawrence Livermore National Laboratory, Berkeley Research Associates, and the U.S. Army Research Laboratory (ARL), Adelphi, MD. He was a co-guest editor of the IEEE Transactions on Plasma ScienceTenth Special Issue on High Power Microwave Generation and co-edited the Proceedings of the 7th Workshop on High Energy Density and High Power RF (RF2005). He served as the Technical Chair of the IEEE International Conference on Vacuum Electronics (IVEC) in 2012 and as the General Chair of IVEC 2014. He is a member of the IEEE Electron Devices Society Technical Committee on Vacuum Electronics, was an elected member of the IEEE Nuclear and Plasma Sciences Society (NPSS) Administrative Committee from 2008 to 2011, and served multiple terms as an elected member of the NPSS Plasma Science and Applications Executive Committee (2005–2007, 2008–2011, 2013–2015). He was a recipient of a Thomas J. Watson Fellowship, two NRL Technology Transfer Awards, and numerous official commendations and distinguished contribution awards from the Army and Navy.

    • Constantin Bulucea
       - Life Fellow
      Constantin Bulucea portrait
      Distinguished Member of the Technical Staff
      Texas Instruments, Retired
      1374 Arleen Avenue
      Sunnyvale, CA 94087
      +1 408 738 9035

      +1 408 508 8120

      Constantin Bulucea (S'69–M'70–SM'88–F'04- LF'13) was born in Romania, where he received the M.S. and Ph.D. degrees in Electronics from thePolytechnic Institute of Bucharest in 1962 and 1974, respectively. In 1969, hewas granted a one-year government scholarship at the University of California, Berkeley,where he received a M.S. degree in Electrical Engineering. His activeprofessional career spanned 50 years, equally split across the Romanian and USsemiconductor histories.

      In Romania, Dr. Bulucea was the scientific director anddirector of the R&D Institute for Electronic Components (ICCE) between 1974and 1986, with assignments of national importance, such as the introduction ofsilicon transistor technology and the development of the process technology forthe Microelectronica MOS/VLSI plant. From that period, his personal legacy includes the creation of theAnnual Conference for Semiconductors (CAS), now an international IEEE event, agraduate course and a book on Linear Integrated Circuits and reference paperson surface breakdown and hot-carrier injection in silicon, originallycommunicated at IEDM and later published in the IEEE Transactions on ElectronDevices and Solid-State Electronics.

      In the US, Dr. Bulucea remained on the technical side of thesemiconductors business, so enjoying the last years of Silicon Valley's "HappyScaling". In particular, at NationalSemiconductor, he was the architect of company's 0.25, 0.18, and 0.13 µm CMOSprocesses for analog and mixed-signal applications. Before that, he brought to completionSiliconix's device/process architecture for the next generation of trench powerDMOS transistors, which became an industry standard in the followingyears. He has been active on the R&Darena as a direct contributor and also as the 2003 chairman of the Advanced Devicesand Technologies thrust of the Semiconductor Research Corporation (SRC) and asa member of the Technical Committees of the Bipolar Circuits and TechnologyMeeting (BCTM) and of the VLSI Technology Symposium. Between 2004 and 2012 hewas the editor of IEEE Electron Device Letters (EDL) for analog andmixed-signals technology. Dr. Bulucea has published over 50 technical articlesin international journals and holds 67 US patents with several others pending.

      In 2001 Dr. Bulucea was elected an Honorary Member of theRomanian Academy and in 2004 became an IEEE Fellow "for contributions totransistor engineering in the area pf power electronics". In 2011, he became aDistinguished Member of the Technical Staff of Texas Instruments (TI), as aresult of TI's acquisition of National Semiconductor. Dr. Bulucea retired from TI next year, on his72nd birthday, continuing to support company's patent applications that he had authored.

      Lecture Topics:

      1. “Physics and Technology of Sub-0.25-mm CMOS Devices” (UC Davis Seminar, 2001).

      2. “Electronic Properties of Silicon and other <Known Materials>” (Stanford Center for Integrated Research, 2003).

      3. “TCAD Revisited – An Engineer’s Point of View” – Excellence in Computer Simulation Symposium of the Network for Computational Nanotechnology (UC Berkeley, 2007).

      4. “Devices and Processes for Mixed Signals” (UC San Diego Seminar, 2003 and 2010). 

      5. Eastern Europe’s Semiconductor Technology - Recollections and Projections (Keynote Address, ESSDERC/ESSCIRC, Bucharest 2013).

    • Subhananda Chakrabarti
       - Dr.
      Subhananda Chakrabarti portrait placeholder
      Indian Institute of Technology-Bombay
      Dept. of Electical Engineering
      Mumbai 400 076
      Phone 1:
      91-22-2576 7421 (O)

      Phone 2

      Subhananda Chakrabartir received his M.Sc. and Ph.D. degrees from the Department of Electronic Science, University of Calcutta, Kolkata, India in 1991 and 2000, respectively. He was a Lecturer in the Dept. of Physics, St. Xavier’s College, Kolkata. He has been a Senior Research Fellow with the University of Michigan, Ann Arbor, from2001 to 2005, a Senior Researcher with Dublin City University, Dublin City, Ireland, from 2005 to 2006, and a Senior Researcher (RA2) with the University of Glasgow, Glasgow, U.K., from 2006 to 2007. He joined as an Assistant Professor in the Department of Electrical Engineering, IIT Bombay, Mumbai, India, in 2007.Presently, he is a Professor in the same department. He has extensively researched in molecular beam epitaxial(MBE) growth, characterization, and fabrication of compound (III-V) GaAs-based semiconductor optoelectronic materials and devices, such as intersubband infrared photodetectors etc. He has been the first to demonstrate complete indigenous development Infrared Photodetector based Focal Plane Array in India. In II-VI (ZnO) based research, he has demonstrated stable p-doping through Plasma Immersion Ion Implantation (PIII) technique and subsequently demonstrated a homojunction ZnO-based UV-LED. He is a fellow of the Institution of Electrical and Telecommunication Engineers (IETE) India, Member of the IEEE, MRS USA, SPIE USA etc. He is the medal recipient of the Materials Research Society of India. Recently, he was awarded NASI-Reliance Industries Platinum Jubilee Award for Application Oriented Innovations in Physical Sciences for the year 2016. He has authored more than 200 papers in international journals and conferences. He has also co-authored a couple of book chapters on intersubband quantum dot detectors. His four (4) research monographs with Springer are in press. Dr. S. Chakrabarti has served as reviewer for a number of international journals of repute such as Applied Physics Letters, Nature Scientific Report, IEEE Photonics Technology Letters, IEEE Journal of Quantum Electronics, Journal of Alloys and Compound, Material Research Bulletin etc.
    • Mansun J. Chan
      Mansun J.  Chan portrait
      Hong Kong University of Science and Tech.
      Dept. of Electronic and Computer Eng.
      Clear Water Bay, Kowloon, Hong Kong
      Phone 1:
      +852 2358 8519

      +852 2358 1485
      Email 1:

      Lecture Topics:  1) Nano-device physics and technology 2) Device modelling and circuit simulation 3) Non-volatile memory technology 4) Bio-sensors and circuits MANSUN CHAN received his MS and Ph.D. from the University of California at Berkeley. He is currently a Professor at the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). His main research covers novel silicon device fabrication and modeling. In particular, he is one of the key developers of the BSIM model series that have been selected to be the industrial standard models for conventional and SOI MOSFETs used by the semiconductor industry worldwide. Prof. Chan has served IEEE in various capacities and he is currently a Distinguished Lecturer of IEEE EDS.

      Biography:  Mansun Chan (S’92-M’95-SM’01-F’13) received Ph.D. degrees from the UC, Berkeley in 1995. He is one of the major contributors to the unified BSIM model for SPICE, which has been accepted by most US companies and the Compact Model Council (CMC) as the first industrial standard MOSFET model. In January 1996, he has joined the EEE faculty at Hong Kong University of Science and Technology.  After that, he developed a SOI MOSFET model, which has been adopted by UC Berkeley as the core of the BSIMSOI model.  Between July 2001 and December 2002, he was a Visiting Professor at University of California at Berkeley and the Co-director of the BSIM program.  In this capacity, he has successfully completed the technology transfer of BSIM3SOI to be the first industrial standard SOI MOSFET model.  In addition to device modeling, Prof. Chan’s current research interests also include nano-transistor fabrication technology, carbon-based device physics, printable transistors, 3D integrated circuits, bio-sensors and cloud computing based simulation platform.  He is current working on an interactive modeling and online simulation (i-MOS) platform to facilitate the interactions between model developers and circuit designers using the Internet technology.

      Prof. Chan is a recipient of the UC Regents Fellowship, Golden Keys Scholarship for Academic Excellence, SRC Inventor Recognition Award, Rockwell Research Fellowship, R&D 100 award (for the BSIM3v3 project), Teaching Excellence Appreciation award, Distinguished Teaching Award and the Shenzhen City Technology Innovation Award by the Chinese Government. He is a Fellow and Distinguished Lecturer of IEEE.

    • Steve S. Chung
       - Fellow
      Steve S.  Chung portrait
      National Chiao Tung University
      Dept. of Electronics Engineering
      1001 University Road
      Hsinchu 300
      Phone 1:
      +886 3 5731830

      +886 3 5734608

      Lecture Topics:  1. The Variability Issues of Small Scale CMOS Devices 2. Extension of Moore's Law Via Strained Technologies 3. Fundamentals of RTN and Its applications to CMOS and Nonvolatile Memories 4. Random Dopant Variations of Trigate CMOS Devices

      Biography:  STEVE S. CHUNG (S'83-M'85-SM'95-F'06) received his Ph.D. degree from the University of Illinois at Urbana-Champaign, in Electrical Engineering in 1985. His Ph.D. thesis advisor is the world-famous scholar and CMOS Co-Inventor, Prof. C. T. Sah.

      Currently, he is a Chair Professor and UMC Research Chair Professor at the National Chiao Tung University (NCTU).  After joining NCTU in 1987, he has been the first Department Head of EECS Honors Program, to promote an undergraduate program for academic excellence from 2004-2005. Later, he was also the Dean of International Affairs Office, Executive Director of school level research center, between 2007-2008. He was a Research Visiting Scholar with Stanford University in 2001, visiting professor to University of California-Merced in 2009-2010, and a guest lecturer at Stanford in the Fall of 2009. He was also the consultant to the two world largest IC foundries, TSMC and UMC, on developing CMOS and flash memory technologies. His recent current research areas include- nanoscale CMOS devices and technology; nonvolatile memory technology and reliability; and reliability physics/interface characterization. He has published more than 220 journal and conference papers, one textbook, and holds more than 20 patents. Since 1995, he has presented more than 22 times in the IEEE flagship conferences, IEDM and VLSI. In particular, he was the first (from Taiwan) to present the paper at VLSI Technology symposium in 1995.

      He is an IEEE Fellow, the current IEEE EDS BoG(Board of Governor) member, IEEE Distinguished Lecturer, EDS Regions/Chapters Chair, and with past involvement as EDS AdCom member (2004-2009), EDS Regions/Chapters Vice-Chair, Guest Editor of TDMR, and Editor of EDL(2002-2008). He has served on various IEEE conference committees, e.g., VLSI Technology, IEDM, IRPS, IPFA, ICMTS, SNW, VLSI-TSA etc. Also, he has served as the TPC Vice-Chair and subsequently the organizing member of SSDM in Japan. ED Taipei chapter was awarded the 2002 EDS Chapter of the Year Award under his leadership as the chapter chair. He was awarded 3 times outstanding Research Award, distinguished PI, and distinguished NSC Research Fellow, from the National Science Council, as well as Distinguished EE Professor and Engineering Professor of the Engineering Societies in Taiwan. More recently, he was also honored the recipient of 2013 Pan Wen Yuan award in recognizing his outstanding achievements in the semiconductor research.

    • Shuji Ikeda
      Shuji  Ikeda portrait
      Tei Solutions, Co. Ltd.
      16-1 Onogawa
      Tsukuba, Ibaraki 305-8
      Phone 1:
      +81 29 849 1276

      +81 29 849 1533

      Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.

    • M.Jagadesh Kumar
       - Senior Member
      M.Jagadesh  Kumar portrait
      Indian Institute of Technology, Delhi
      Professor of Electrical Engineering
      Hauz Khas, New Delhi 110016
      Phone 1:
      +011-2659 1085

      Phone 2
      +011-2659 1959

      Lecture Topics: 1) Nanowire electronics: the future of CMOS technology 2) Green Transistors for energy efficient integrated circuits 3) Can Bipolar Transistors be made without doping? 4) Tunnel field effect transistors: Design and Optimization 5) Trench power MOSFETs: Design and Optimization 6) Perspectives on the evolution of semiconductor manufacturing: Enabling the impossible

      Dr. Kumar is currently the NXP (Philips) Chair Professor established at IIT Delhi by Philips Semiconductors, Netherlands (now NXP Semiconductors India Pvt Ltd). He was the Co-ordinator of VLSI Design, Tools and Technology interdisciplinary program. He is a Chief Investigator of the Nano-scale Research Facility (NRF) at IIT Delhi. Dr. Kumar received the 2013 Award for Excellence in Teaching (in large class category) from IIT Delhi. He works in the area of Nanoelectronic Devices, Device modeling and simulation, IC Technology and Power semiconductor devices. He has published extensively in the above areas with four book chapters and more than 160 publications in refereed journals and conferences. He is on the Editorial Board of Scientific Reviews, an online and open access primary research publication from the publishers of Nature. He is an Editor of IEEE Transactions on Electron Devices and the Editor-in-Chief of IETE Technical Review. Dr. Kumar is a Fellow of Indian National Academy of Engineering, The National Academy of Sciences, India, and The Institution of Electronics and Telecommunication Engineers, India. He has been awarded the 29th IETE Ram Lal Wadhwa Gold Medal for distinguished contribution in the field of Semiconductor device design and modeling. He has received the first ever ISA-VSI TechnoMentor Award given by the India Semiconductor Association to recognize a distinguished Indian academician and researcher for playing a significant role as a mentor and researcher. He is a recipient of 2008 IBM Faculty award in recognition of professional achievements. He has delivered a number of invited lectures in conferences and workshops in India and abroad to large audiences on topics related to Nanoelectronics. For more details on Dr. Kumar, you can visit

    • Colin McAndrew
      Colin McAndrew portrait
      Freescale Semiconductor
      2100 East Elliot Road
      MD EL-317
      Tempe, AZ 85284
      Phone 1:
      +1 480 413 3982

      Colin McAndrew (S'82-M'84-SM'90-F'04) received the Ph.D. and M.A.Sc. degrees in Systems Design Engineering from the University of Waterloo, Waterloo, Ontario, Canada, in 1984 and 1982 respectively, and the B.E. (Hons) degree in Electrical Engineering from Monash University, Melbourne, Victoria, Australia, in 1978. From 1978 to 1980 and from 1984 to 1987 he was with the Herman Research Laboratories of the State Electricity Commission of Victoria, Australia. From 1987 to 1995 he was at AT&T Bell Laboratories, Allentown PA. Since 1995 he has been with Freescale Semiconductor (formerly Motorola Semiconductor Products Sector), Tempe AZ, where he is a Fellow of the Technical Staff. His work is primarily on compact and statistical modeling and characterization for circuit simulation. He was a recipient of the Ian Langlands Medal from the Institute of Engineers of Australia in 1978, best paper awards for ICMTS in 2012 and 1993 and CICC in 2002, and the BCTM Award in 2005. He is a Fellow of the IEEE, was an editor of the IEEE Transactions on Electron Devices from 2001 through 2010, and is or has been on the technical program committees for the IEEE BCTM, ICMTS, CICC, and BMAS conferences. 
    • Stanislav Moshkalev
      Stanislav Moshkalev portrait
      State University of Campinas

      Stanislav A. Moshkalev (M`99) received the B.S. and M.S. degree in quantum electronics from St. Petersburg Polytechnic University, St. Petersburg, Russia, in 1975 and the Ph.D. degree in physics and chemistry of plasmas from A.F. Ioffe Physical-Technical Institute, Russian Academy of Sciences, St. Petersburg, Russia, in 1984.

      Since 1984, he held research positions in several scientific institutions in Russia, UK and Brazil. Since 1999, he has been a Researcher and since 2010, an Associate Director of the Center for Semiconductor Components, at the UNICAMP - State University of Campinas, Brazil. He is the coeditor of one book, and the author of more than 65 articles, and 5 inventions. His research interests include micro and nanofabrication and characterization, synthesis and characterization of carbon nanotubes and graphene, quantum dots, processing by focused ion, electron and laser beams, AFM, Raman spectroscopy, plasmas for etching and deposition, lithography, thin films, chemical, optical and bio sensors with ultralow power consumption, MEMS and NEMS, microfluidics, novel electron devices (memory, phototransistors, sensors) based on nanostructured carbon materials.

      Dr. Moshkalev is a member of IEEE, Brazilian Physical Society, Brazilian Microelectronics Society, and Brazilian Carbon Association. He is currently a coordinator of the Cooperative Research Network in Nanoinstrumentation (Brazil, CNPq - National R&D Council) and of the Associated Nanotechnology Laboratory of the Ministry of Science, Technology and Innovations (Brazil). Dr. Moshkalev’s awards and honors include the Researcher Fellowship from CNPq and the Distinguished Visiting Researcher Fellowship from IRCEP (the Queen´s University of Belfast, UK).


    • M.K. Radhakrishnan
       - Senior Member
      M.K.  Radhakrishnan portrait
      NanoRel Technical Consultants
      273, 18D Main, 6th Block
      Koramangla, Bangalore 560095
      Phone 1:
      +91 80 25630695

      Phone 2
      +91 9447663869

      Lecture Topics: 1. Physical Analysis Challenges and Interface Physics Studies in Silicon Nano Devices 2.  Building in Reliability in Devices through Analysis and Study of Failure Mechanisms.

      Biography:  M.K. Radhakrishnan (M’82-SM’94) received B.Sc from Kerala University, India in 1972, M.Sc in Solid State electronics from Sardar Patel University, India in 1975 and Ph.Ddegree in Semiconductor Physics from Cochin University of Science and Technology in 1981.

      He is currently Directorof NanoRel Technical Consultants Singapore from 2004.  He has been with Indian Space Research Organization till 1990. From 1991-1993 he was with ST Microelectronics Singapore. From 1993 to 2001 he was with Institute of Microelectronics Singapore, where he pioneered the setting up of a full-fledged device failure analysis laboratory.  From 1994 to 2004 he served as adjunct professor at National University of Singapore. His current research interests include analysis and reliability in nano-electronic devices and interface physics studies.

      Dr. Radhakrishnan is a fellow of Institution of Electrical and Telecommunication Engineers India, member of Electron Device Failure Analysis Society (EDFAS) USA and ESD Association USA.  He served as Editor of Journal of Semiconductor Technology and Science (Korea) during 2001-2003 and is an Editorial board member of Microelectronics Reliability journal (UK). He served as Guest Editor to IEEE Transactions Devices Materials and Reliability and edited or co-edited of 4 conference proceedings.  He was Technical Chair IEEE International Symposium on Physical and Failure Analysis of ICs (IPFA) in 1995 and 1997 and General Chair of IPFA in 1999.  He was IEEEIEDST General Chair in 2009. He has been in the technical program committees of ESREF, IRPS, EPTC, MIEL, ICEE and EOS/ESD Symposium.  Currently he is the Editor-in Chief of IEEE EDS Newsletter and serves as a member of IEEE EDS Technical Committee on Electronic Materials.  He is a Distinguished Lecturer of IEEE Electron Devices Society.


    • Tian-Ling Ren
       - Senior Member
      Tian-Ling  Ren portrait
      Tsinghua University
      Institute of Microelectronics
      Beijing 100084
      Phone 1:
      +86 10 6278 9151

      Phone 2
      Ext. 311

      Lecture Topics: New Material Based Micro/Nano Devices Flexible Electronics Novel Acoustic and RF Devices Non-volatile Memory

      Biography: Tian-Ling Ren received his Ph.D. degree in solid-state physics from Department of Modern Applied Physics, Tsinghua University, China in 1997.

      He is full professor of Institute of Microelectronics, Tsinghua University since 2003. He has been a visiting professor at Electrical Engineering Department, Stanford University from 2011 to 2012.

      For these years, Prof. Ren’s research mainly focused on novel micro/nano electronic devices and key technologies, including nonvolatile memories (RRAM, FeRAM), RF devices (resonator, inductor), sensors, and MEMS. Prof. Ren’s main contributions are that he has developed the new integration methods for novel material based micro/nano device and circuit applications. For examples, he proposed the RRAM structure with integration of single layer graphene, which can drastically decrease the power consumption of the device; he developed the ferroelectric thin film based integrated acoustic devices; he also proposed the graphene sound source devices for the first time; and he realized the high quality ultra-flexible structured RF resonators with very promising applications. He has published more than 300 journal and conference papers. He has more than 40 patents.

      He has been an Elected Member at Large, and Distinguished Lecturer of IEEE Electron Devices Society. He is also Council Member of Chinese Society of Micro/Nano Technology. For these years, Prof. Ren has been the technical committee member for several leading international conferences, including International Electron Device Meeting (IEDM), and Device Research Meeting (DRC). He is also editorial board member of Scientific Reports (Nature Publishing Group).

    • Enrico Sangiorgi
       - Fellow
      Enrico Sangiorgi portrait
      University of Bologna
      Via Fontanelle 40
      Forli 47100
      Phone 1:
      +39 0543 374418

      Enrico Sangiorgi (F’05) received the Laurea degree in electrical engineering from the University of Bologna, Italy, in 1979. In 1983, 1984, and 1991, he was a Visiting Scientist at the Center for Integrated Systems, Stanford University, Stanford, California, for approximately three years. From 1985 to 2001, he was a consultant at Bell Laboratories, Murray Hill, NJ, where he was a Resident Visitor for more than three years. In 1993, he was appointed Full Professor of Electronics at the University of Udine, Italy, where he started the Electrical Engineering Program and the microelectronic group. In 2002, he joined the University of Bologna, where he is currently in charge of the nanomicro- electronics group at the Campus of Cesena. From 2005 to 2011 he has been the Director of Consorzio Nazionale Interuniversitario per la Nanoeletronica (IU.NET – Italian Universities Nanoelectronic Team), a Legal Consortium grouping nine University Groups active in the field of Nanoelectronics. In 2005 he has been appointed member of the CATRENE Scientific Committee. Since 2006 he is the Vice Chairman of the Scientific Community Council (SCC) of ENIAC (the European Nanoelectronics Initiative Advisory Council). In 2007 he has been appointed member of the Steering Board of AENEAS, the private section of the ENIAC European Technology Platform. In 2008 he has been appointed CEO of Rinnova srl., a new company founded by the University of Bologna aiming to bring research and innovation to SME’s. From 2008 to 2012 he has been the Dean of the Second School of Engineering at the University of Bologna. In 2012 he has been appointed Director of the Department of Electrical and Electronic Engineering – Guglielmo Marconi – of the University of Bologna. Since 2014 he is the Director of the SINANO Institute, International Organization grouping 23 European Institutions active in the field of nanoelectronics.

      From 1994 to 2009 he has been Editor of IEEE Electron Device Letters. He has been the Guest Editor of several Special Issues on major scientific journals such as IEEE Transactions on Electron Devices, Solid State Electronics, etc. He has been a member of the Technical Committees of several International Conferences on Electron Devices: IEDM (’91-96; ’04-’06), ESSDERC (‘99-present), INFOS (’95-03), ULIS (’00-‘08), etc. Since 2011 he is a member of the Steering Board of the IEEE Journal of Photovoltaics.

      Enrico Sangiorgi is a Fellow of the IEEE, Distinguished Lecturer of the Electron Device Society, he has been Chairman of the Electron Device Society TCAD Technical Committee from 2004 to 2011 member of the Cledo Brunetti Award Committee and Education Award Committee of the EDS. Since 2011 he is elected member of the EDS AdCom. Since 2013 he is a member of the EDS Fellows Evaluation Committee. He has been involved in several European Projects of the 5, 6, and 7 FP with Management Responsibilities, and he has acted as Project Reviewer for the European Commission. The research interests of Enrico Sangiorgi, developed in cooperation with research centers and companies such as Bell Labs., Philips, Infineon Tech., ST Microelectronics, IMEC, and CEA-LETI, include the physics, characterization, modeling, and fabrication of silicon solid-state devices and integrated circuits. In particular he has been working on several aspects of device scaling, its technological, physical, and functional limits, as well as device reliability for silicon CMOS and bipolar transistors. In order to tackle and eventually overcome the hurdles of device scaling, down to the ultimate physical and technological limits, he has devised and developed several original concepts and methods in the characterization and modeling of nanoscale silicon devices. Recently his interests included the physics and modeling of Photo-voltaics devices where he has worked on several aspects of device optimization. Enrico Sangiorgi coauthored 34 papers presented at the International Electron Devices Meeting (IEDM) Conference, and overall more than 250 papers on major journals and conference proceedings.

      Lecture Topics: Nanodevices modeling and simulation Photovoltaics devices and technologies Energy Harvesting devices, technologies and systems

    • Krishna Shenai
       - Fellow
      Krishna Shenai portrait
      Vice President
      LoPel Corporation
      2259 Palmer Circle
      Naperville, IL 60564
      Phone 1:
      (630) 904-2765

      (630) 788-5241

      Krishna Shenai (F'01) earned his B. Tech. (electronics) degree from the Indian Institute of Technology in Madras, India in 1979, MS (EE) degree from the University of Maryland - College Park, MD in 1981, and Ph.D. (EE) from Stanford University, Stanford, CA in 1986. Dr. Shenai's employment experience included COMSAT Labs, General Electric Corporate R&D Center, Intel Corporation, University of Wisconsin - Madison, University of Illinois - Chicago,  Utah State University, and The University of Toledo. Currently, Dr. Shenai is employed as Principal Electrical Engineer at Argonne National Laboratory in Chicago, IL where he is leading the effort to  develop and commercialize wide bandgap power semiconductor materials and devices for power electronics switching, power amplifier and sensor applications.  For nearly 30 years,  Dr. Shenai has pioneered and made seminal contributions to the development and manufacturing of power semiconductor materials and devices, and power converters and power amplifiers. He is a Fellow of the American Physical Society (APS), a Fellow of the Institution of Electrical and Electronics Engineers (IEEE), a Fellow of the American Association for the Advancement of Science (AAAS), a Fellow of the Institution of Electrical and Telecommunication Engineers of India (IETE-India), and a member of the Serbian Academy of Engineering. Dr. Shenai has authored or co-authored more than 350 peer-reviewed archival papers and 10 book chapters; edited four books; and, is a named inventor in 13 issued US patents. He was the Editor of IEEE Trans. Electron Devices (1990-2000), founding Editor-in-Chief (EIC) of IEEE Electron Devices Society Newsletter (1994-2002), and served as the invited guest editor for a Special Issue of IEEE Trans. Electron Devices and two Special Issues of IEEE J. Solid-State Circuits. Currently, he serves as the Editor of new IEEE J. Electron Devices Society; a member of the EDS Technical Committee on "Semiconductor Manufacturing"; an Associate Editor of  forthcoming Special Issue of  IEEE Trans. Power Electronics on "Wide Bandgap Semiconductor Power Electronics"; founding lead organizer of  the Electrochemical Society (ECS) Symposium on GaN and SiC Power Technologies; and, a member of the Board of Governors of DS&T Division of ECS. Dr. Shenai founded and managed two venture financed startup companies to successful outcomes. He is the recipient of several professional research and teaching awards including the Best Paper Award at the 1995 IEEE BCTM Conference and the University Scholar Award from the University of Illinois. Dr. Shenai is a Distinguished Lecturer of IEEE Electron Devices Society and is listed in Marquis Who's Who in America 2011 edition.

      Lecture Topics: Wide Bandgap Power Electronics, Distributed Clean Energy and Power Systems

    • Rajendra Singh
       - Fellow
      Rajendra Singh portrait
      Clemson University
      Dept. of Electircal and Computer Engineering
      105 Riggs Hall, Box 340915
      Clemson, SC 29634-0915
      Phone 1:
      +1 864 656 0919

      +1 864 656 5910

      Rajendra Singh (S'75-M'78-SM'82-F'02) received the B.S. degree from Agrac University, Agra, India, in 1965, the M.S. degree in physics (electronics-wireless as the special subject) from the Meerut University, India, in 1968, the M.S. degree in physics (thesis on superconductivity) from the Dalhousie University, Halifax, NS, Canada, and the Ph.D. degree in physics (dissertation on solar cells) from McMaster University, Hamilton, ON, Canada, in 1979. Dr. Singh is currently D. Houser Banks Professor in the Department of Electrical and Computer Engineering and the Director of the Center for Silicon Nanoelectronics at Clemson University. With proven success in operations, project/program leadership, R&D, product/process commercialization, and start-ups, Dr. Singh is a leading semiconductor and photovoltaic (PV) and expert with over 33 years of industrial and academic experience of photovoltaic and semiconductor industries. The technology invented by Dr. Singh at Energy Conversion Devices (US Patent No. 4419533. South African Patent No. 830748; Great Britain Patent No. 2116364) is used in the manufacturing of amorphous thin film PV modules sold by United Solar. The technology invented by Dr. Singh (US Patens #.5, 820, 942, 1998& # 5, 980, 637, 1999) has been licensed to RTP tool manufacturer AG Associates (prototype tool developed in his Lab)...From solar cells to integrated circuits, he has led the work on semiconductor and photovoltaic device materials and processing by manufacturable innovation and defining critical path.

      He has published over 330 papers in various journals and conference proceedings. He is editor or coeditor of more than fifteen conference proceedings. He has presented over 50 keynote addresses and invited talks in various national and international conferences. He has served on a number of committees of various professional societies. Currently he is serving as Chair of IEEE Electron Devices Society Technical Committee on Semiconductor. 

      Part of Prof. Singh's awards and honors include IEEE distinguished Lecturer for Latin American on Solar Cells (Region 9) 1983, Distinguished Technologist United Nations Development Program (1987), IEEE Electron Device Society distinguished Lecturer (1994-2012), and outstanding Researcher Award, Clemson University, Sigma Xi Chapter (1997), five Clemson University awards for Faculty Excellence, Thomas D. Callinan Award of the Electrochemical Society (1998), J.F. Gibbons Award from the 11th IEEE International Conference on Advanced Thermal Processing of Semiconductors (2003), and the 2005 McMaster University Distinguished Alumni Award. Photovoltaics World (October 2010) selected him as one of the 10 Global "Champions of Photovoltaic Technology". He is Fellow of the Society of Optical Engineering, American Association for the Advancement of Science, and American Society of Metals, ASM.

      Lecture Topics: Photovoltaics as dominant electricity generation technology in 21st century sub 10 nm semiconductor manufacturing Wide Band Gap Based Semiconductor Manufacturing Bottom Up Based Nanostructures: Manufacturing challanges Nanosystems: Manufacturing Challanges and Opportunities 

    • Charles Surya
       - Optoelectronics Devices
      Charles Surya portrait
      Hong Kong Polytechnic University
      Electronic and Information Engineering
      Yuk Choi Road
      Hong KongHong Kong
      Phone 1:
      852 2766 6220

      852 2362 4711

      Charles Surya received his PhD in Electrical Engineering from the University of Rochester in 1987. From 1987 to 1994 he was associated with the Electrical and Computer Engineering Department of Northeastern University.  He joined the Electronic and Information Engineering (EIE) Department in 1994 and remained there since.  Professor Surya’s research interests are: optoelectronic materials and devices including MOCVD growth of GaN thin films and the study of GaN-based LEDs and UV detectors; growth of organic-inorganic hybrid perovskite materials and the fabrication of advanced perovskite based photovoltaic cells; and low-frequency noise in electron devices. Presently, Professor Surya is spearheading a collaborative effort between The Hong Kong Polytechnic University and the City of Dongguan, China for the establishment of an R&D Center on the study of photovoltaic materials, devices and systems.  He became a full professor of the Department in 2002andsince 2013hewas appointed Clarea Au Endowed Professor in Energy.  Professor Surya had served in various administrative posts including Associate Head of the EIE Department (2002-2005), Associate Dean of the Faculty of Engineering (2007 – 2010) and the Acting Dean of the Faculty of Engineering (2010 – 2012) of The Hong Kong Polytechnic University.  While serving as the Associate Dean and Acting Dean of the Faculty he was responsible for the implementation of outcome-based approach in the Engineering Faculty.  From 2007 – 2013 Professor Surya was the The Hong Kong Polytechnic University representative to the Hong Kong University Grants Council Panel for Outcome-based Education to oversee the implementation of Outcome-based Approach among the Engineering Faculties in Hong Kong.  He had been active in EDS and had served in various capacities including conference co-chair and chapter chair in the past.  He is presently serving as the Chairman of the Optoelectronic Devices Technical Committee.