Share:Share

Muhannad Bakir

MOS Devices and Technology

bakir

Georgia Institute of Technology
School of Electrical and Computer Engineering 791 Atlantic Dr NW
Atlanta GA 30332-0269
USA
Phone: +1 404 385 6276

E-mail: 

muhannad.bakir@mirc.gatech.edu

Muhannad S. Bakir received the B.E.E. degree (summa cum laude) from Auburn University, Auburn, AL, in 1999 and the M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology (Georgia Tech) in 2000 and 2003, respectively.

He is currently an Associate Professor and the ON Semiconductor Junior Professor in the School of Electrical and Computer Engineering at Georgia Tech. His areas of interest include three-dimensional (3D) electronic systems, advanced interconnection and packaging, and nanofabrication technology. He is the co-editor (with James D. Meindl) of a book entitled Integrated Interconnect Technologies for 3D Nanoelectronic Systems (Artech House, 2009) and is the author/coauthor of more than 110 journal publications and conference proceedings, 14 US patents, and the presenter of 2 conference tutorials, including an invited tutorial on 3D technology at the 2007 International Solid-State Circuits Conference (ISSCC).

Dr. Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium. He is also a recipient of the Semiconductor Research Corporation (SRC) Inventor Recognition Awards (2002, 2005, 2009). Dr. Bakir also received twelve conference and student paper awards including one from the IEEE Custom Integrated Circuits Conference (CICC), five from the IEEE Electronic Components and Technology Conference (ECTC), and three from the IEEE International Interconnect Technology Conference (IITC).

Dr. Bakir an Associate Editor of IEEE Transactions on Components, Packaging and Manufacturing Technology, and was a Guest Editor of the June 2011 Special Issue of IEEE Journal of Selected Topics in Quantum Electronics. He is also a member of the International Technology Roadmap for Semiconductors (ITRS) technical working group for Assembly and Packaging (AP).