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Fellow Evaluations Committee

  • Fellow Evaluation Committee Chair

    • Paul K.L. Yu
       - Fellow
      University of California at San Diego
      ECE Department, MS 0407
      9500 Gilman Dr., Eng. Bldg. Unit 1, Room 3604
      La Jolla, CA 92093-0407
      USA
      Phone 1:
      +1 858 534 6180

      Fax:
      +1 858 534 0556
      Lecture Topics: Recent Advances in Photonic Devices for RF/Wireless, Semiconductor Wafer Bonding Technology for Device Integration
  • Fellow Evaluation Committee Members

    • Mikael Östling
       - Fellow
      KTH, Royal Institute of Technology
      Dept of Microelectronics and InfoTech
      Electrum 229
      Kista SE-164 40
      Sweden
      Phone 1:
      +46 8 790 4301

      Fax:
      +46 8 752 7850

      Mikael Östling (M’ 85- F’04) received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He is currently department head of Integrated Devices and Circuits and was the dean of the School of Information and Communication Technology, KTH, between 2004–12. Östling was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. In 2005 he co-founded the company TranSiC, acquired in full by Fairchild Semiconductor 2011. He was awarded the first ERC grant for advanced investigators. His research interests are nanoscaled Si and Ge device technologies and emerging 2D materials, as well as device technology for wide bandgap semiconductors for high power / high temperature applications. He has supervised 35 PhD theses work and co -authored about 500 scientific papers published in international journals and conferences. Mikael Östling was an editor of the IEEE Electron Device Letters 2005-2014 and appointed vice president of EDS since 2014. Mikael is a Fellow of the IEEE.


      Lecture Topics: SiC Device Technology for energy efficiency and for high temperature operation Silicon Nanoscaled Device Technology

    • Meyya Meyyappan
       - Fellow
      NASA Ames Research Center
      Center for Nanotechnology
      Mailstop 229-3
      Moffett Field, CA 94035
      USA
      Phone 1:
      +1 650 604 2616

      Fax:
      +1 650 604 5244
      Lecture Topics: 1. An overview of recent developments in Nanotechnology

      2. Nanotechnology in nanoelectroncis, optoelectronics and sensor development

      3. Carbon based electronics

      4. Nanotechnology: development of practical systems and nano-micro-macro integration.
    • Jacobus W. Swart
       - Senior Member
      FEEC/UNICAMP - State University of Campinas
      Av. Albert Einstein 400
      Campinas, Sao Paul 13.083-970
      Brazil
      Phone 1:
      +55 19 3746 6001

      Lecture Topics: MEMS, sensors, ISFET, CNT and graphene, Advanced CMOS processes
    • Usha Varshney
      National Science Foundation
      Arlington, VAUSA
    • Juzer Vasi
      Department of Electrical Engineering
      Indian Institute of Technology
      Bombay, Mumbai 400076
      India
      Juzer Vasi is with the EE Department at the Indian Institute of Technology Bombay (IITB), Mumbai. He has worked in in the areas of CMOS and Photovoltaic devices. He was co-founder of the National Centre for Photovoltaic Research and Education (NCPRE) at IITB, and is the Research Thrust Co-Lead for the Solar Energy Research Institute for India and the US (SERIIUS), a bi-national consortium project. His current area of research is photovoltaic module reliability.
      He is a Fellow of the IEEE and the Indian National Academy of Engineering (INAE). He was an Editor of IEEE Transactions on Electron Devices from 1996 to 2003, an EDS Distinguished Lecturer from 2001 to 2006, and Chair of the EDS Asia-Pacific SRC from 2005 to 2006.
      He obtained the B.Tech. degree in Electrical Engineering from IITB and a Ph.D. from Johns Hopkins University.
    • Albert Z.H. Wang
       - Fellow
      University of California
      Dept. of Electrical and Computer Engineering
      Office: 417 EBU2, Lab: 227 EBU2
      Riverside, CA 92521
      USA
      Phone 1:
      +1 951 827 2555

      Fax:
      +1 951 827 2425

      Lecture Topics:


      1. ESD-RFIC co-design techniques.
      2. Mixed-mode ESD protection circuit simulation design methodology.
      3. Above-IC ESD protection by nano technology
      4. Field-programmable ESD protection by nano technology

    • Bin Zhao
       - Fellow
      ON Semiconductor
      32 Discovery, Suite 100
      Irvine, CA 92618
      USA
      Phone 1:
      +1 949 266 6800

      Fax:
      +1 614 737 6800

      Lecture Topics:


      > Analog/Mixed-Signal/RF IC and Enabling Technologies
      > High Performance VLSI Interconnect