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T-SM Editor-in-Chief and Editors

T-SM Editorial Board

  • T-SM Editor-in-Chief

    • Anthony Muscat
      Anthony Muscat portrait
      Professor
      University of Arizona
      1133 E. James Rogers Way
      Harshbarger Bldg., Room 134
      Tuscon, AZ 85721
      USA
      Phone 1:
      520-626-6580

      Fax:
      520-626-5397

      T-SM Subject Category: Environment Safety and Health


      Research Areas: thin film deposition, thin film etching, atomic layer deposition, III-V materials, semiconductor surface preparation and cleaning


      Professional Memberships: IEEE, AIChE, MRS, AAAS, ACS, ECS, APS, AVS


      Biography: Anthony J. Muscat received the B.S. degree (1983) from the University of California, Davis and the M.S. (1984) and Ph.D. (1993) degrees from Stanford University all in chemical engineering. He is currently a professor and chair of the Department of Chemical and Environmental Engineering at the University of Arizona in Tucson. His research interests are in the surface chemistry of electronic materials and the synthesis and self-assembly of II-VI quantum dots and metal nanoparticles. He works in the areas of atomic layer deposition, atomic layer etching, and surface preparation and cleaning for thin film growth. He is currently the Editor-in-Chief of the Transactions on Semiconductor Manufacturing. He is also serving as the Program Chair for the American Vacuum Society International Symposium in 2015.

  • T-SM Associate Editors

    • Hunter Brugge
       - Yield Enhancement
      Hunter Brugge portrait
      Sr. Director, LSI Engineering
      Samsung Austin Semiconductor
      US Office:
      (512) 672-1149

      US Mobile:
      (512) 507-0459

      Hunter B. Brugge received the Ph.D. degree in chemical engineering from Texas A&M University, College Station, TX, USA in 1989 and the B.S. degree in chemical engineering from the University of Virginia, Charlottesville, VA, USA in 1983. From 1989 to 2003 he was with VLSI Technology, San Antonio, TX, USA where he managed fab engineering, technology transfer, and the fab wafer size conversion after VLSI Technology was acquired by Philips Semiconductor. Since 2003, he has been with Samsung Austin Semiconductor, Austin, TX, USA working in various fab engineering roles including Thin Films, technology transfer, wafer fab startup, and most recently yield enhancement and metrology. He is currently Senior Director responsible for Defect Elimination, Defect Control, Metrology, and Wafer Test. He holds 9 U.S. patents.

    • Alain Diebold
       - Metrology
      Alain  Diebold portrait
      College of Nanoscale Science and Empire Innovation Professor of Nanoscale Science
      SUNY Polytechnic Institute
      257 Fuller Road
      Albany, NY 12203
      USA
      Phone 1:
      518-956-7363

      Fax:
      +1 518-339-7419
      Alain Diebold is Interim Dean of the College of Nanoscale Sciences which includes the Nanoscience and Nanobioscience Constellations at SUNY Polytechnic Institute. The College also leads the Institute for Nanoelectronics Discovery and Exploration (INDEX) which is one of three Centers funded by the Semiconductor Research Corporation. Alain holds a PhD in Chemistry from Purdue University. He is a SPIE Fellow and an AVS Fellow. Alain was hired as an Empire Innovation Professor of Nanoscale Science and Executive Director Center for Nanoscale Metrology. Prior to joining academia, he was a senior chemist at Allied Signal before joining SEMATECH where SEMATECH Senior Fellow. For many years, he co-lead the Metrology Roadmap Technical Working Group for the International Technology Roadmap for Semiconductors which he started. This group wrote the semiconductor industry’s roadmap for Metrology and Characterization for more than fifteen years.
    • John W. Fowler
       - Factory Modeling and Control
      John W. Fowler portrait placeholder
      Arizona State University
      Dept. of Supply Chain Management
      Tempe, AZ 85226
      USA
      Phone 1:
      +1 480 965 4330

    • Ruey-Shan Andy Guo
       - Advanced Process Control
      Ruey-Shan Andy Guo portrait
      Dean and Professor
      College of Management, National Taiwan University
      No.1, Sec.4, Roosevelt Rd.
      Taipei 106
      Taiwan
      Phone 1:
      +886-2-33661050

      Fax:
      +886-2-23622228

      Research Areas:  Process Control, Quality Engineering, Supply Chain Management

      Professional Memberships:  IEEE/EDS

      Biography:  Prof. Guo received his Ph.D. degree in Mechanical Engineering with a major in manufacturing and a minor in solid state physics from Massachusetts Institute of Technology in 1991. From 1991 to 1995, he was a research engineer at National Semiconductor, Santa Clara, CA, USA. He also obtained his MBA degree from San Jose State University in 1994.


      Since 1995, he has been with National Taiwan University. He is currently the Dean of College of Management as well as the Distinguished Professor in the Department of Business Administration. During his current position, he has been a principal investigator or co-PI to many industry and institution funded projects in the areas of quality management, technology management, and supply chain management.


      Prof. Guo teaches undergraduate and graduate courses in operations management, entrepreneurship and innovation management, and supply chain management. He won Excellent Teaching Awards from National Taiwan University several times and the best journal paper awards from the Chinese Management Association in 1999 and 2009. He is an IEEE member and is currently the Associate Editor of IEEE Transactions on Semiconductor Manufacturing.

    • Soichi Inoue
       - Photolithography
      Soichi Inoue portrait
      Senior Manager
      Lithography Process Technology Department,
      Center for Semiconductor Research and Development,
      Toshiba Corporation Semiconductor & Storage Products Company
      1, Komukai Toshiba-Cho
      Saiwai-Ku, Kawasaki 212-8583
      Japan
      Phone 1:
      819018570954

      Biography:  Soichi Inoue joined Toshiba Corporation in 1987, and has been engaged in the research and development of many lithography technologies for over 25 years. He is currently the General Manager at EUVL Infrastructure Development Center, Inc. (EIDEC) on assignment from Toshiba in April 2011. He returned to Toshiba and was promoted to the Senior Manager of Lithography Process Technology Department in Apr. 2015.


      His first research in Toshiba was the development of soft X-ray microscopy to investigate the key technologies on the image formation with mirror optics in the vacuum environment. Then he has been engaged in the development of optical lithography. His specific area of expertizes is overall lithography technologies including lithography integration, scanner technology, advanced mask technology, resolution enhancement technology, process monitor technology, OPC, DFM, lithography modeling and numerical computing of lithographic imaging. His current research interest is overall Next Generation Lithography including EUV lithography, Nano-inprint, DSA technologies. He has published more than 100 papers in technical journals and conferences, and has been awarded 90 patents. He won the Semi Technology Symposium Award for double patterning technology in 2008.


      He received his B.S. in Mechanical Engineering Science, and M.S. in Information Processing from Tokyo Institute of Technology in 1985 and 1987, respectively. He enrolled in a doctoral program at Tokyo Institute of Technology in 2010 and received his doctoral degree in Sept., 2011.

    • Dongchan Kim
       - Advanced Processing
      Dongchan Kim portrait
      Advanced Processing
      Advanced Micro-Fabrication Equipment Inc Korea
      Osan City 18103
      South Korea
      Phone 1:
      +82 10 9198 7889

      Biography:  Dongchan Kim received the B.S. degree from Seoul National University, Seoul, South Korea, the M.S. and Ph.D. degrees majoring in physical chemistry from KAIST(Korea Advanced Institute of Science and Technology), Taejon, South Korea. After doing the post doctoral study in department of chemistry at University of North Carolina at Chapel Hill, NC, USA, he joined Samsung Electronics as a senior process engineer in 2000. Since then, he has spent his career working in various semiconductor fields - chemical vapor deposition, integration management and yield control, dry etching, and equipment development, etc. From 2006 to 2007, he was a Samsung assignee to IMEC, Leuven, Belgium. He is currently a Principal Engineer at Semiconductor R&D Center. He has about 25ea of publications and presentations. He was a keynote speaker for several symposiums such as APCPST 2012, DPS 2013, and ICMAP 2014. He also has about 50 patents worldwide as the 1st author or co-author.

    • Bo Lojek
       - Equipment & Process Technology
      Bo  Lojek portrait
      Atmel Corporation
      Atmel Corporation
      1150 E Cheyenne Mountain Blvd
      Colorado Springs, CO 80906
      USA
      Bo Lojek is principal engineer at Atmel Corp. He holds a Ph.D. degree in solid-state physics from King Charles University in Prague, Czechoslovakia. He joined the semiconductor industry in 1964 as a rubylith mask draftsman. He was trained during his professional career by companies such as SGS, Tesla, Motorola, AMD and Atmel. He designed or co-designed 24 bipolar and MOS manufacturing processes and holds over 100 patents, of which 48 were or are used in high-volume manufacturing. He is the author of History of Semiconductor Engineering (Springer 2007). He owns a collection of over 8000 early integrated circuits from nineteen sixties and seventies. He is one of the last scientific individualists that are dying out in an age of teamwork and wireless collectivization.
    • Lars Mönch
       - Professor
      Lars  Mönch portrait
      University of Hagen
      Dept. of Mathematics and Computer Science
      UniversitatsstraBe 1
      Hagen 58097
      Germany
      Phone 1:
      +4923319874593

      Fax:
      +4923319874519
      Lars Mönch is a Full Professor in the Department of Mathematics and Computer Science at the University of Hagen, Germany. He received a master’s degree in applied mathematics and a Ph.D. in the same subject from the University of Göttingen, Germany. He also holds a habilitation degree in information systems from the Technical University of Ilmenau.

      His current research interests are in simulation-ba­sed production control of semiconductor wafer fabrication fa­cilities, applied optimization and artificial intelligence appli­cations in manufacturing, logistics, and service operations. He is a member of GI (German Chapter of the ACM), GOR (German Operations Research Society), SCS, and INFORMS.

      Prof. Mönch served as an Associate Editor for IEEE Transactions on Automation Science and Engineering from 2008-2012.
    • Linda Milor
       - Yield Modeling & Analysis
      Linda Milor portrait
      Georgia Institue of Technology
      School of Electrical and Computer Engineering, Georgia Tech
      Atlanta, GA 30332
      USA
      Phone 1:
      404 894 4793

      Research Areas:  yield, reliability, and variation in semiconductor circuits


      Professional Memberships:  IEEE


      Biography:  Dr. Milor has worked in the fields of yield analysis, reliability, and testing since the mid-1980s. She has over 100 publications in these areas. She has a Ph.D. from U.C. Berkeley in Electrical Engineering. She is currently a Professor of Electrical and Computer Engineering at Georgia Tech. Prior to working at Georgia Tech, she has worked as a Product Engineering Manager at Advanced Micro Devices, where she was responsible for yield and wafer quality.

    • Nital S. Patel
       - Advanced Process Control
      Nital S. Patel portrait
      Intel Corporation, M/S
      Sort/Test Technology Development
      5000 W Chandler Blvd
      CH5-295
      Chandler, AZ 85285
      USA
      Phone 1:
      +1 480 552 1218

      Nital S. Patel (S’91–M’96–SM’01) received the B.Tech. degree from the Indian Institute of Technology, Kanpur, India, and the M.S. and Ph.D. degrees from the University of Maryland, College Park, all in electrical engineering. He is currently with the Assembly and Test Technology Development group, Intel Corporation, Chandler, AZ, where he is a Principal Engineer responsible for innovations in data analytics and manufacturing systems. Previously, he was a Senior Member of Technical Staff focusing on process control at Texas Instruments, Inc. He holds eleven patents in the area of semiconductor process control and is the author/co-author of over fifty publications.
    • Anthony J. Walton
       - Yield Modeling & Analysis
      Anthony J. Walton portrait
      The University of Edinburgh
      SMC
      School of Engineering
      Kings Buildings
      Edinburgh EH9 3JF
      United Kingdom
      Phone 1:
      +44 131 650 5620

      Research Areas:  Microsystems, sensors, integration


      Professional Memberships:  IET (CEng), IEEE/EDS (SM), FRSE, FHEA


      Biography:  Anthony Walton is Professor of Microelectronic Manufacturing at the University of Edinburgh in the School of Engineering and is a member of the School's Institute for Micro and Nano Systems. For the past 30 years he has been actively involved with the semiconductor industry in a number of areas associated with silicon processing which includes both IC technology and microsystem/MEMS. This includes microelectronic test structures, MEMS (Micro Electro Mechanical Systems), yield improvement, Design for Manufacturability (DFM) and Technology Computer Aided Design (TCAD). His present interests also include the applications of micro and nanotechnology to biotechnology, magnetic materials for semiconductor applications, sensors and interconnect technology. He also has had a long interest in integrating new technologies (such as MEMS) and materials with foundry CMOS to create smart microsystems. He has won a number of awards for his work, and has published over 400 papers. Professor Walton was instrumental in setting up the Scottish Microelectronics Centre of which he is currently a Director.