Finance Committee Chair
Finance Committee Members
Paul Berger - Fellow
Paul R. Berger
Ohio State University, Department of Electrical and Computer Engineering, Columbus, Ohio, USA
Tampere University, Department of Electronics and Communications Engineering, Printed and Organic Electronics Group, Tampere, Finland
-Si-based Resonant Interband Tunnel Diodes for Quantum Functional and Multi-level Circuitry (Mixed-Signal, Logic, and Low Power Embedded Memory) to Extend CMOS
-Organic Photovoltaics: An Introduction to OPV plus Plasmonic enhancements (i.e. point-of-use energy harvesting, conformable to flexible and curved surfaces)
-Passive Millimeter Wave Imaging for Security and Safety via Si-based Backward Diode Sensors (i.e. detect concealed weapons and airplane safety for sight through fog, smoke and light rain)
-Fully Printed Flexible Internet-of-Things Nodes with Energy Scavenging and Non-toxic Energy Storage
-Nitride-Based Resonant Tunneling Structures for Terahertz Gain
-Unipolar-doped Co-Tunneling Structures: A new pathway for efficient light emission without P-type doping
Paul R. Berger (S’84 M’91 SM’97 F’11) is a Professor in Electrical & Computer Engineering at Ohio State University and Physics (by Courtesy). He is also a Distinguished Visiting Professor at Tampere University in Finland. He received the B.S.E. in engineering physics, and the M.S.E. and Ph.D. (1990) in electrical engineering, respectively, all from the University of Michigan, Ann Arbor. Currently, Dr. Berger is actively working on quantum tunneling devices, printable semiconductor devices & circuits for IoT, bioelectronics, novel devices, novel semiconductors and applied physics.
Formerly, he worked at Bell Laboratories, Murray Hill, NJ (1990-’92) and taught at the University of Delaware in Electrical and Computer Engineering (1992-2000). In 1999, Prof. Berger took a sabbatical leave while working first at the Max-Planck Institute for Polymer Research, Mainz, Germany and then moved on to Cambridge Display Technology, Ltd., Cambridge, United Kingdom. In 2008, Prof. Berger spent an extended sabbatical leave at IMEC (Interuniversity Microelectronics Center) in Leuven, Belgium while appointed as a Visiting Professor in the Department of Metallurgy and Materials Engineering, Katholieke Universiteit Leuven, Belgium. And more recently he took a sabbatical leave in 2015-2016 at Tampere University of Technology.
He has authored over 120 articles, 5 book sections and been issued 22 patents with 6 more pending from 60 + disclosures with a Google Scholar H-index of 33. Some notable recognitions for Dr. Berger were an NSF CAREER Award (1996), a DARPA ULTRA Sustained Excellence Award (1998), a Lumley Research Award (2006, 2011), a Faculty Diversity Excellence Award (2009) and Outstanding Engineering Educator for State of Ohio (2014). He has been on the Program and Advisory Committees of numerous conferences, including the IEDM, ISDRS, EDTM meetings. He currently is the Chair of the Columbus IEEE EDS/Photonics Chapter and Faculty Advisor to Ohio State’s IEEE Student Chapters. In addition, he is Chair of the EDS technical committee on Electronic Materials and a member of their Flexible Electronics committee too. He was also an SRC Vice-Chair for IEEE EDS in Regions 1-3,7, and recently elected to the IEEE EDS Board of Governors (19’-21’). He is a Fellow and Distinguished Lecturer of IEEE EDS and a Senior member of Optical Society of America.
Brief bio: Navakanta Bhat received his Ph.D. in Electrical Engineering from Stanford University, in 1996. Then he worked at Motorola’s Advanced Products R&D Lab in Austin, TX until 1999. He is currently a Professor at the Indian Institute of Science (IISc), Bangalore. His current research is on Nanoelectronics and Sensors. He has more than 200 publications and 20 patents. He was instrumental in creating the National Nanofabrication Centre (NNfC) at IISc, benchmarked against the best university facilities in the world. He is the recipient of IBM Faculty award and Outstanding Research Investigator award (Govt. of India). He is a Fellow of INAE. He was the Editor of IEEE Transactions on Electron Devices, during 2013-2016. He is the member of the National Innovation Council in Nanoelectronics. He is the founder and promoter of a startup called “PathShodh Healthcare”, which builds point-of-care diagnostics for diabetes and its complications.
- Nanotransistors with 2D materials : Opportunities and Challenges
- Electrochemical Biosensors for managing Diabetes and its Complications
- Single Chip Metal Oxide Gas Sensor Array for Environment Monitoring
- Nanostructured High Performance Gas sensors
Joachim N. Burghartz - Fellow
Joachim N. Burghartz is an IEEE Fellow, an IEEE Distinguished Lecturer, recipient of the 2014 EDS J.J. Ebers Award, and has been an ExCom member of the IEEE Electron Devices Society. He received his MS degree from RWTH Aachen in 1982 and his PhD degree in 1987 from the University of Stuttgart, both in Germany. From 1987 thru 1998 he was with the IBM T. J. Watson Research Center in Yorktown Heights, New York, where he was engaged in early development of SiGe HBT technology and later in research on integrated passive components, particularly inductors, for application to monolithic RF circuits. From 1998 until 2005 he was with TU Delft in the Netherlands as a full professor and from 2001 as the Scientific Director of the Delft research institute DIMES. In fall 2005 he moved to Stuttgart, Germany, to head the Institute for Microelectronics Stuttgart (IMS CHIPS). In addition, he is affiliated with the University of Stuttgart as a full professor. More recently, he also became CEO of the IMS Mikro-Nano Produkte GmbH. Dr. Burghartz has published about 350 reviewed articles and holds more than 30 patents. Distinguished Lecture Titles -Hybrid Systems in Foil -Ultra-thin chip technology -GaN technologies for power and RF
-Ultra-Thin Chips – A New Paradigm in Silicon Technology
-Hybrid Systems-in-Foil - Combining the Merits of Thin Chips and of Large-Area Electronics
-GaN-on-Si Technology for Power, RF & Specials
-Marvels of Microelectronic Engineering
Patrick Fay - Fellow
Patrick Fay received a B.S. degree in Electrical Engineering from the University of Notre Dame in 1991, followed by the M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1993 and 1996, respectively. He joined the faculty of the Department of Electrical Engineering at the University of Notre Dame in 1997, where he currently a professor as well as the director of the Notre Dame Nanofabrication Facility. His research interests include the design, fabrication, and characterization of III-V microwave and millimeter-wave electronic devices and circuits, power devices, and high-speed optoelectronic devices and optoelectronic integrated circuits. His research also includes the development and use of micromachining techniques for the fabrication of microwave and millimeter-wave components and packaging. Prof. Fay was awarded the Department of Electrical Engineering’s Outstanding Teacher award in 1998 and 2018, and Notre Dame's College of Engineering’s Outstanding Teacher award in 2015. He is a fellow of the IEEE, and Electron Device Society Distinguished Lecturer, and serves as an associate editor of the IEEE Transactions on Components, Packaging and Manufacturing Technology, IEEE Transactions on Electron Devices, and IEEE Transactions on Microwave Theory and Techniques.
- III-N Devices and Integration for Millimeter-Wave and Power Applications
- Vertical GaN Devices and Epitaxial Lift-Off Processing for High Performance Power Applications
- Advances in III-N Devices for Power and Internet of Things Applications
- III-N Nanowire FETs for Low-Power Applications
- Advanced Tunneling-Based Devices for mm-Wave Sensing and Imaging
Meyya Meyyappan - Fellow
Center for Nanotechnology
Nanoscale Vacuum Electronics: Back to the Future?
Printed and Flexible Electronics: Equipment, Processes and Applications
Nanoelectronics Beyond Moore’s Law Era
Nanotechnology: Development of Practical Systems and Nano-Micro-Macro Integration
Meyya Meyyappan is Chief Scientist for Exploration Technology at NASA Ames Research Center in Moffett Field, CA. Until 2006, he served as the Director of the Center for Nanotechnology. He is a founding member of the Interagency Working Group on Nanotechnology (IWGN) established by the Office of Science and Technology Policy (OSTP). The IWGN is responsible for putting together the National Nanotechnology Initiative. He has authored or co-authored over 400 articles in peer-reviewed journals and made over 250 Invited/Keynote/Plenary Talks across the world and over 250 seminars at universities. His research interests include nanoelectronics, carbon nanotubes and various inorganic nanowires, their growth and characterization, and application development in chemical and biosensors, instrumentation, energy storage devices, electronics and optoelectronics.
Dr. Meyyappan is a Fellow of the IEEE, ECS, AVS, MRS, IOP, AIChE, ASME, National Academy of Inventors, and Canadian Academy of Engineering. For his contributions and leadership, he has received numerous awards including: a Presidential Meritorious Award; NASA's Outstanding Leadership Medal; Arthur Flemming Award given by the Arthur Flemming Foundation and the George Washington University; IEEE Judith Resnick Award; IEEE-USA Harry Diamond Award; AIChE Nanoscale Science and Engineering Forum Award; Distinguished Engineering Achievement Award by the Engineers' Council; Pioneer Award in Nanotechnology by the IEEE-NTC; Sir Monty Finniston Award by the Institution of Engineering and Technology (UK); Outstanding Engineering Achievement Merit Award by the Engineers' Council; IEEE-USA Professional Achievement Award; AVS Nanotechnology Recognition Award; IEEE Nuclear and Plasma Sciences Society Merit Award; Distinguished Grumman Project Engineering Award by the Engineers' Council; AVS Plasma Prize; MRS Impact Award. For his sustained contributions to nanotechnology, he was inducted into the Silicon Valley Engineering Council Hall of Fame in 2009. He has received Honorary Doctorate from the University of Witwatersrand, Johannesburg, South Africa and Concordia University, Montreal, Canada. For his educational contributions, he has received: Outstanding Recognition Award from the NASA Office of Education; the Engineer of the Year Award (2004) by the San Francisco Section of the American Institute of Aeronautics and Astronautics (AIAA); IEEE-EDS Education Award; IEEE-EAB (Educational Activities Board) Meritorious Achievement Award in Continuing Education.
M.K. Radhakrishnan - Life Senior Member
MK Radhakrishnan (M’82, SM’94, LSM’18) is the Founder Director of NanoRel LLP -Technical Consultants providing analysis-based solutions to micro and nano electronic industries for improving reliability of devices. As a researcher in the area of semiconductor device failure physics for more than 35 years, he worked with industries (ST Microelectronic and Philips), research institutions (Institute of Microelectronics, Singapore and Indian Space Research Organization) and in academia with National University of Singapore. As a technical consultant he works with many MNCs and also provides training on device failure analysis & reliability to various Industries, Universities and Research Centres.
- Circa 70 – Semiconductor Device Progression and Challenges towards Nanoera.
- Interface Physics and Analysis Challenges in Silicon Nanodevices
- Are the Progressions towards the “Benefit of Humanity”? - A Failure Analyst’s View
Ravi M. Todi
Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
- MOS Devices and Technology
- About EDS
- Mission, Vision and Field of Interest Statements
- Mission Fund
- President's Message
- EDS Constitution
- EDS Bylaws
- EDS Charters
- EDS Roster
- Governance Meeting
- Board of Governors Election
- ExCom/Elected Members-at-Large
- Standing Committees
- Technical Committees
- Publication Representatives
- IEEE Committee Representatives
- Past Presidents
- EDS Executive Office
- Strategic Plan
- Volunteer Resources
- EDS 50th Anniversary Booklet
- EDS Guide to State-of-the-Art Electron Devices
- EDS Overview Slides