VLSI Technology & Circuits Committee
Objective
The objective of the VLSI Technology and Circuits Committee is to identify new/hot areas of interest to the Electron Devices and Solid-State Circuits communities. Based on the nature of the areas, we will recommend any or all of the following:
Initiate topical workshops of current interest (attached to existing conferences or start new ones)
Special Issues for major publications (e.g., J-Eds, T-ED)
Panel session topics for EDS sponsored/co-sponsored conferences
Special Sessions for EDS sponsored/co-sponsored conferences
This committee strongly suppors EDTM (Electron Devices Technology and Manufacturing) conference which was estableshed by our activity.
Membership
This is a non-voting Ex-Officio Forum member position with a two-year term and serves up to two-terms. We limit the membership terms so that new ideas can be generated, incorportated, and executed.
Operation
Operation of this committee is done mainly by email. We have face-to-face meetings in conjunction with the EDS BoG Meeting. There are two BoG meetings a year, with one being held in conjunction with IEDM and the other is held in May or June in conjunction with another EDS sponsored conference or event. The other opportunity to have face-to-face (ad-hoc) meetings is in conjunction with EDS sponsored conference such as EDTM (in Asia around March) and ESSDERC (in Europe around September). This means each quarter, members have the chance to meet in person. Since member's are located globally this helps communication among all committee members.
History
The VLSI Technology and Circuits Technical Committee was formed in 1998 under the leadership of Prof. Charles G. Sodini (MIT), followed by Dr. H.-S. Philip Wong (IBM), Werner Weber (Infineon), Dr. James A. Hutchby (SRC) Dr. Bin Zhao (Freescale Semiconductor) and Shuji Ikeda (tei Solutions). Since its formation, the VLSI Committee has chartered its missions to identify new technical trends, to help foster new technical concepts, and to serve the emerging needs of the Electron Devices and Solid-State Circuits communities in VLSI. The committee members include many well recognized technical experts representing a very wide spectrum of technical expertise in VLSI devices, technology, and circuits. Every year, the committee brainstorms (by email) on ideas that are suitable for a new workshop, special issue for a journal, panel sessions, and special sessions for conferences. Committee members then take these ideas forward and find a way to make them happen, either by being the organizers themselves, or by finding suitable organizers for the topic. We work closely together with journal editors and conference organizers. Especially in the case of new workshops, it is much easier to attach the new workshop to existing conferences rather than to start new. EDTM conference was established and started in 2017 based on our activity and many committee members are supporting this conference.
Contact
If you have ideas for a new workshop, a special issue for journals, or topics for panel sessions and special sessions for conferences, please contact current committee members. If you would like to volunteer in the committee or have suggestions and comments to the activities of this committee, please contact Kazunari Ishimaru.
Chair
Hitoshi Wakabayashi
Tokyo Institute of Technology
wakabayashi.h.ab@m.titech.ac.jp
Any comments, ideas, and suggestions related to the field of VLSI Technology and Circuits are sincerely welcome!
Please click here to view the committee's article from the April 2017 edition of the EDS Newsletter.
VLSI Technology and Circuits Committee Chair
VLSI Technology and Circuits Committee Members
Aaron Voon-Yew Thean is a Professor of Electrical and Computer Engineering at the National University of Singapore (NUS). He is also a consulting Fellow to IMEC, a Nano-electronic Research Center, based in Belgium. Prior to joining NUS in 2016, Aaron served as IMEC’s Vice President of Logic Technologies and the Director of the Logic Devices Research. At IMEC, he directed the research and development of advanced device technologies ranging from ultra-scaled FinFETs, Nanowire FETs, to III-V/Ge Channels, Tunnel FETs to emerging Beyond CMOS logic nano-device architectures based on Spintronics and 2-D materials. He has been involved in Design and Process Technology Co-optimizations (DTCO) of emerging technologies targeting 7nm, 5nm, and beyond. Before 2011, he was with Qualcomm’s CDMA technologies in San Diego, California, USA. There, he led the Strategic Silicon Technologies Group responsible for new System-On-Chip technology definition for upcoming Qualcomm technologies. From 2007 to 2009, Aaron served as the International Semiconductor Development Alliance (ISDA) FEOL and Device Manager at IBM, where he co-led an eight-company alliance device/process team to develop the 28-nm and 32-nm low-power bulk CMOS technology at IBM East Fishkill, New York. His team developed the Industry’s first foundry-compatible Gate-First High-k Metal-Gate (HKMG) with novel SiGe channel Low-Power bulk CMOS technologies. It enabled some of today’s most successful smart mobile devices in production by the foundry partners. Before IBM, Aaron was a senior staff scientist with Freescale Semiconductor and Motorola’s Advanced Product Research and Development Laboratory (APRDL). He subsequently led the Novel Device Research Group there in Austin, Texas. He performed path-finding research on a variety of advanced semiconductor devices that included Strained-Si-On-Silicon, FinFETs, FDSOI, and Nano-crystal Flash Memory. Aaron graduated from the University of Illinois at Champaign-Urbana, USA, where he received his B.Sc. (Highest Honors & Graduated as Edmund J. James’ Scholar), M.Sc., and Ph.D. degrees in Electrical Engineering. He was awarded the 2001 Gregory Stillman Semiconductor Research Award for his Ph.D. work. He has published over 300 technical papers and holds more than 50 U.S. patents for inventions in the field of advanced electronics. Among his notable recognitions include the 2014 Compound Semiconductor Industry Innovation award for his research group’s break-though III-V FinFET work. In 2013, he was given the Best Collaboration Award from Samsung Electronics Korea for R&D collaborations contributing towards its Semiconductor R&D Center. Aaron received the 2010 Young Alumni Achievement Award from his Alma Mater, University of Illinois, for his contribution to advanced transistor R&D, as well.
Dr. Huaqiang Wu is presently the director of the Department of Microelectronics and Nanoelectronics, and the director of the Institute of Microelectronics, Tsinghua University, Beijing, China. Dr. Wu has also served as the deputy director of Beijing Innovation Center for Future Chips. Dr. Wu received his Ph.D. degree in electrical and computer engineering from Cornell University, Ithaca, NY, in 2005. Prior to that, he graduated from Tsinghua University, Beijing, China, in 2000 with double B.S. degrees in material science & engineering and enterprise management. From 2006 to 2008, he was a senior engineer and MTS in Spansion LLC, Sunnyvale, CA. He joined Tsinghua University in 2009. Dr. Wu’s research interests include emerging memory and neuromorphic computing technologies. Dr. Wu has published more than 200 technical papers and owns more than 90 US and China patents. Dr. Wu’s papers have appeared on Nature, Nature Nanotechnology, Proceedings of the IEEE, IEEE EDL, ISSCC, IEDM, VLSI, etc. Currently, Dr. Wu serves as the Technical Program Chair (TPC) for 2021 EDTM conference and TPC member of VLSI Technology, DAC, VLSI-TSA, etc.
