VLSI Technology & Circuits Committee

Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.

Lecture Topics

- Designer Ge quantum-dot phototransistors for highly-integrated, broadband optical interconnects 
- Germanium quantum dots for functional charge sensing/metrology devices 
- The Unique Optoelectronic and Energy-Conversion Devices based on Ge/Si/O Interactions 
- Self-organized Ge QD/SiO2/SiGe-recess channel FETs

Aaron Voon-Yew Thean is a Professor of Electrical and Computer Engineering at the National University of Singapore (NUS). He is also a consulting Fellow to IMEC, a Nano-electronic Research Center, based in Belgium. Prior to joining NUS in 2016, Aaron served as IMEC’s Vice President of Logic Technologies and the Director of the Logic Devices Research. At IMEC, he directed the research and development of advanced device technologies ranging from ultra-scaled FinFETs, Nanowire FETs, to III-V/Ge Channels, Tunnel FETs to emerging Beyond CMOS logic nano-device architectures based on Spintronics and 2-D materials. He has been involved in Design and Process Technology Co-optimizations (DTCO) of emerging technologies targeting 7nm, 5nm, and beyond. Before 2011, he was with Qualcomm’s CDMA technologies in San Diego, California, USA. There, he led the Strategic Silicon Technologies Group responsible for new System-On-Chip technology definition for upcoming Qualcomm technologies. From 2007 to 2009, Aaron served as the International Semiconductor Development Alliance (ISDA) FEOL and Device Manager at IBM, where he co-led an eight-company alliance device/process team to develop the 28-nm and 32-nm low-power bulk CMOS technology at IBM East Fishkill, New York. His team developed the Industry’s first foundry-compatible Gate-First High-k Metal-Gate (HKMG) with novel SiGe channel Low-Power bulk CMOS technologies. It enabled some of today’s most successful smart mobile devices in production by the foundry partners. Before IBM, Aaron was a senior staff scientist with Freescale Semiconductor and Motorola’s Advanced Product Research and Development Laboratory (APRDL). He subsequently led the Novel Device Research Group there in Austin, Texas. He performed path-finding research on a variety of advanced semiconductor devices that included Strained-Si-On-Silicon, FinFETs, FDSOI, and Nano-crystal Flash Memory. Aaron graduated from the University of Illinois at Champaign-Urbana, USA, where he received his B.Sc. (Highest Honors & Graduated as Edmund J. James’ Scholar), M.Sc., and Ph.D. degrees in Electrical Engineering. He was awarded the 2001 Gregory Stillman Semiconductor Research Award for his Ph.D. work. He has published over 300 technical papers and holds more than 50 U.S. patents for inventions in the field of advanced electronics. Among his notable recognitions include the 2014 Compound Semiconductor Industry Innovation award for his research group’s break-though III-V FinFET work. In 2013, he was given the Best Collaboration Award from Samsung Electronics Korea for R&D collaborations contributing towards its Semiconductor R&D Center. Aaron received the 2010 Young Alumni Achievement Award from his Alma Mater, University of Illinois, for his contribution to advanced transistor R&D, as well.