EDS BoG Elected Members at Large

EDS BoG Members at Large are elected for a three-year term (maximum two terms) with voting privileges for all society matters, including Elections, and Constitution & Bylaws changes. 

  • 2020 Elected Members

    • Roger Booth
      Roger Booth portrait placeholder
      Term 1
      Qualcomm
    • Mukta Farooq
       - Fellow
      Mukta Farooq portrait
      Term 2nd term
      IBM Research
      Phone 1:
      914-456-7415

      Lecture Topics:  3D Technology Overview, 3D Integration and Die Stacking


      Bio

      Dr. Mukta Farooq is a metallurgist and materials scientist, with expertise in 3-Dimensional and Heterogeneous Integration and Packaging, die and wafer stacking for hybrid memory cube and other applications, CMOS FET back end of line structures, flip-chip/C4 technology, lead-free alloys, chip package interaction, and intellectual property development.

      Mukta is currently a Principal Research Staff Member at IBM Research. She has over 200 issued patents, and was named an IBM Lifetime Master Inventor as well as a member of the IBM Academy of Technology. She received an outstanding technical achievement award for leadership in 3D integration technology and multiple high value patent awards. She has authored several external publications, given invited talks, and taught short courses at conferences and universities.

      Mukta is an IEEE Fellow, an EDS Distinguished Lecturer, Chair of the IEEE EDS Mid-Hudson Valley Chapter, and an active contributor to Women in Engineering. Mukta received her BS from IIT Bombay, MS from Northwestern University, and PhD from Rensselaer Polytechnic Institute.




       

    • Edmundo A. Gutiérrez-D.
       - Senior Member
      Edmundo A. Gutiérrez-D. portrait
      Term 1st term
      Solid State Phenomena; Emerging Technology and Devices
      INAOE
      L. E. Erro Nr. 1
      Tonantzintla, Puebla 72840
      Mexico
      Phone 1:
      +52 222 247 0517

      Fax:
      +52 222 247 0517
      Lecture Topics:  Magneto-quantum conductance effects in mosfets and nano-scaled semiconductor devices, low-temperature electronics, and magnetic sensors.

       Theoretical and experimental research on particle-wave duality conductance properties in semiconductor devices, DC and RF/Power device degradation and circuit reliability.

      Dr. Edmundo A. Gutiérrez-D. got his PhD in 1993 from the Catholic University of Leuven, Belgium with the thesis entitled “Electrical performance of submicron CMOS technologies from 300 K to 4.2 K”. From 1989 to 1993, while working for his PhD, served as a research assistant at the Interuniversity Microelectronics Center (IMEC) in Leuven, Belgium. In 1996 was guest Professor at Simon Fraser University, Vancouver, Canada. In 1996 spent two months as an invited lecturer at the Sao Paulo University, Brazil. In 2000 acted as Design Manager of the Motorola Mexico Center for Semiconductor Technology. In 2002 was invited lecturer at the Technical University of Vienna, Austria. In 2005 joined the Intel Mexico Research Center as technical Director. Currently he holds a Professor position at the National Institute for Astrophysics, Optics and Electronics (INAOE), in Puebla, Mexico. Prof. Gutiérrez-D. is an IEEE senior member since 2008.
      Professor Gutiérrez-D. has published over 100 scientific publications and conferences in the field of semiconductor device physics, has supervised 5 M.Sc. and 10 Ph.D. thesis, and is author of the book “Low Temperature Electronics, Physics, Devices, Circuits and Applications” published by Academic Press in 2000. Prof. Gutiérrez-D. is member of the Mexico National System of Researchers and technical reviewer for the Mexico National Council for Science and Technology (CONACyT).
    • Benjamin Iniguez
       - Device and Process Modelling
      Benjamin Iniguez portrait
      Term 1st term
      Senior Member
      Universitat Rovira i Virgili (URV)
      Avinguda dels Paisos Catalans 26
      Tarragona 43007
      Spain
      Phone 1:
      34 977558521

      Fax:
      34 977559605
      Benjamin Iñiguez obtained the Ph D in Physics in 1992 and 1996, respectively, from the Universitat de les Illes Balears (UIB). From February 1997 to September 1998 he was working as a Postdoctoral Researcher at the Rensselaer Polytecnhnic Institute in Troy (NY, USA). From September 1998 to January 2001 he was working as a Postdoctoral Scientist in the Université catholique de Louvain (Louvain-la-Neuve, Belgium), supported by two Marie Curie Fellowships from the European Commission. In February 2001 he joined the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA)of the Universitat Rovira i Virgili (URV), in Tarragona, Catalonia, Spain) as Titular Professor. In February 2010 he became Full Professor at URV. He obtained the Distinction from the Generalitat for the Promotion of University Research in 2004 and the ICREA Academia Award (the highest award for university professors in Catalonia, from ICREA Institute) in 2009 and 2014, for a period of 5 years each. He led one EU-funded project (“COMON”, 2008-12) devoted to the compact modeling of nanoscale semiconductor devices and he is currently leading one new EU-funded project (DOMINO, 2014-18) targeting the compact modeling of organic and oxide TFTs.
      His main research interests are the characterization, parameter extraction and compact modelling of emerging semiconductor devices, in particularorganic and oxide Thin-Film Transistors, nanoscale Multi-Gate MOSFETs and GaN HEMTs. He has published more than 150 research papers in international journals and more than 130 abstracts in proceedings of conferences.
    • Carmen M. Lilley
      Carmen M. Lilley portrait
      Term 2nd term
      University of Illinois at Chicago
      Department of Mechanical Engineering
      1200 West Harrison St.
      3031 ERF MC 251
      Chicago, Illinois 60607
      USA
      Phone 1:
      312-413-7561

      Fax:
      312-413-0447
      Dr. Carmen M. Lilley obtained her BS in General Engineering at the University of Illinois at Urbana-Champaign in 1998. She then attended Northwestern University and obtained her PhD in Theoretical and Applied Mechanics in 2003. Upon completing her PhD, she joined the Department of Mechanical and Industrial Engineering at the University of Illinois at Chicago as an Assistant Professor and was promoted to Associate Professor in 2010. Dr. Lilley has published in prestigious journals such as the Applied Physics Letters (APL), Journal of Applied Physics (JAP), and Nano Letters. She served as an Associate Editor for the ASME Journal of Computational on Nonlinear Dynamics from 2011-2015, and has reviewed manuscripts for APL, Journal of Applied Mechanics, JAP, Journal of Vibration and Acoustics, and Nano Letters. She has received various awards such as the National Science Foundation Faculty Early Career (CAREER) Development Award and the College of Engineering Research Award.
      Dr. Lilley is a senior member of IEEE. Within EDS, Dr. Lilley is on the IEEE Electron Devices Society Educational Committee Member (2012-Present), Chair of the MS and PhD Fellowship Committee (2014-Present), and a Board-of-Governors Member-at-Large (2015-Present). She is the technical committee chair on Nanomaterials for the Nanotechnology Council (NTC) (2006-Present) and served as their Council Representative for IEEE Women in Engineering Society (2012-2016). She has also served on the program committee for the NTC flagship conference IEEE Nano as a reviewer, track chair, and was the technical program chair for IEEE Nano 2014.
    • Durga Misra
       - Senior Member
      Durga  Misra portrait placeholder
      Term 2nd term
      NJ Institute of Technology
      Electrical and Comp. Eng. Department
      323 M L King Blvd.
      Newark, NJ 07102-1824
      USA
      Phone 1:
      +1 973 596 5739

      Lecture Topics:
      1. Challenges for Nanoelectronics: More Moore and More than Moore.
      2. High-k on High-Mobility Substrates: An interface Issue
    • Manoj Saxena
      Manoj Saxena portrait
      Term 1st term
      Deen Dayal Upadhyaya College
      University of Delhi
      Sector 3, Dwarka
      New Delhi 110078
      India
      Manoj Saxena is an Associate Professor in Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi, India. He received B.Sc. (with honors), M. Sc., and Ph.D. degrees from the University of Delhi in 1998, 2000, and 2006 respectively. He has authored or coauthored 210 technical papers in international journals and various international and national conferences. His current research interests are in the areas of analytical modeling, design, and simulation of Optically controlled MESFET/MOSFET, silicon-on-nothing, insulated-shallow-extension, grooved/concave-gate MOSFETs, cylindrical gate MOSFET and Tunnel FET. He is a reviewer to many journals including Solid State Electronics, Journal of Physics: D Applied Physics and IEEE TED and EDL. Manoj is a Senior Member of IEEE and also Member of Institute of Physics (UK), Institution of Engineering and Technology (UK), National Academy of Sciences India (NASI) and International Association of Engineers (Hong Kong). Currently, he is the Secretary of EDS Delhi Chapter. For his voluntary contribution, Manoj received the outstanding EDS Volunteer recognition from EDS Chapters in the region in 2012.

      Lecture Topics:
      Dielectric Pocket MOSFET: A Novel Device Architecture
      Embedded Insulator based Novel Nanoscaled Novel MOSFET Structures
      Tunnel Field Effect Transistor and its Application as Highly Sensitive and Fast Biosensor
      Modeling and Simulation of Tunnel Field Effect Transistor
      Dual Material Junctionless Double Gate Transistor for Analog and Digital Performance
    • Sumant Sood
      Sumant  Sood portrait placeholder
      Term 1st term
      Suss Microtec Inc.
      228 Suss Drive
      Waterbury Center, VA 05677
      USA
      Phone 1:
      +1 802 244 5181 Ext. 391

      Fax:
      +1 802 244 1348
  • 2018 Elected Members

    • Navakanta Bhat
      Navakanta Bhat portrait placeholder
      Term 1
      Indian Institute of Science
      BangaloreIndia
      Brief bio:
      Navakanta Bhat received his Ph.D. in Electrical Engineering from Stanford University, in 1996. Then he worked at Motorola’s Advanced Products R&D Lab in Austin, TX until 1999. He is currently a Professor at the Indian Institute of Science (IISc), Bangalore. His current research is on Nanoelectronics and Sensors. He has more than 200 publications and 20 patents. He was instrumental in creating the National Nanofabrication Centre (NNfC) at IISc, benchmarked against the best university facilities in the world. He is the recipient of IBM Faculty award and Outstanding Research Investigator award (Govt. of India). He is a Fellow of INAE. He was the Editor of IEEE Transactions on Electron Devices, during 2013-2016. He is the member of the National Innovation Council in Nanoelectronics. He is the founder and promoter of a startup called “PathShodh Healthcare”, which builds point-of-care diagnostics for diabetes and its complications.


      Distinguished Lecturer Topics:
      1. Nanotransistors with 2D materials : Opportunities and Challenges

      2. Electrochemical Biosensors for managing Diabetes and its Complications

      3. Single Chip Metal Oxide Gas Sensor Array for Environment Monitoring

      4. Nanostructured High Performance Gas sensors
    • Daniel Mauricio Camacho Montejo
      Daniel Mauricio  Camacho Montejo portrait placeholder
      Term 2
      Intel Corporation
      Folsom Design Center
      Folsom, CAUSA
    • Simon Deleonibus
       - Fellow
      Simon  Deleonibus portrait
      Term 1
      Chief Scientist/Directeur Scientifique
      Silicon Technologies
      CEA/LETI, MINATEC
      17 rue des Martyrs
      Grenoble Cedex 38054
      France
      Phone 1:
      +33 438 785973

      Fax:
      33 438 785183
      Simon Deleonibus, retired from CEA-LETI on Jan 1st 2016 as Chief Scientist after 30 years of Research on Micro Nanoelectronics Devices Architectures. Before joining CEA-LETI, he was with Thomson Semiconductors(1981-1986), where he developed and transferred to production advanced microelectronics devices and products. He gained his PhD in Applied Physics from Paris University(1982). He is Visiting Professor at Tokyo Institute of Technology(Tokyo, Japan) since 2014 , National Chiao Tung University(Hsinchu, Taiwan) since 2015 and at Chinese Academy of Science(Beijing, PRC) since 2016 .
      He is distinguished CEA Research Director(2002), IEEE Distinguished Lecturer(2004), Fellow of the IEEE (2006), Fellow of the Electrochemical Society (2015).
      He was awarded the titles of Chevalier de l’Ordre National du Mérite(2004) and Chevalier de l’Ordre des Palmes Académiques(2011), the 2005 Grand Prix de l’Académie des Technologies. He is member of the ITRS since1998, the European Research Council Panel(2007), the Nanosciences Foundation Board of Trustees( 2007).
      He was Associate Editor of IEEE Trans. on Elect. Dev.(2008-2014) and Member of the IEEE Electron Devices Society Board of Governors(01/2009-12/2014) and reelected(2016-2018) ; Chair of IEEE EDS Region 8 SRC (2015-2016) ; Secretary of IEEE Electron Devices Society (2016-2017).

    • Meikei Ieong
       - Fellow
      Meikei Ieong portrait placeholder
      Term 1
      Hong Kong Applied Science and Technology Research Institute
      Chief Technology Officer

      Biography: Meikei Ieong (SM’01) received the B.S. degree in electrical engineering from the National Taiwan University, Taipei, Taiwan, in 1991 and the M.S. and Ph.D. degrees in electrical and computer engineering from the University of Massachusetts, Amherst, in 1993 and 1996, respectively. He also received an MBA degree from the Sloan Fellows Program of Massachusetts Institute of Technology in 2013.


      Meikei is currently Vice-President of TSMC Europe. He was program director of TSMC’s 28nm High-Performance and Mobile Technologies. Prior to that he held various engineering and management positions at IBM including senior manager at IBM TJ. Watson Research Center, Yorktown, NY. He’s recipient of IBM Technical Achievement and Corporate awards and was elected as a Master Inventor at IBM Research.


      He held an adjunct associate professor position with the Department of Electrical Engineering from the Columbia University, NY in 2001. He was General Chairman of the IEEE International Electron Devices Meeting (IEDM). He has served as an editor for the IEEE Transaction on Electron Devices since 2010 and as chair of the IEEE EDS Education Award committee since 2013. He has Published more than one hundred papers in referred journals and conference proceedings and more than eighty patents. He also speaks frequently at international conferences and seminars.

    • Murty Polavarapu
      Murty Polavarapu portrait placeholder
      Term 1
      BAE Systems
      Mail Stop MVA01-016
      9300 Wellington Road
      Manassas, VA 20110
      USA
      Phone 1:
      +1 703 367 4197

    • Ravi M. Todi
       - MOS Devices and Technology
      Ravi M.  Todi portrait
      Term 1
      Fellow
      Director and Senior Technologist Foundry Technology Development
      Foundry Technology Development
      951 SanDisk Drive
      Milpitas, CA 95035
      USA
      Phone 1:
      O: 408-801-8118

      Phone 2
      C: 858-947-8513

      Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
    • Douglas P. Verret
       - Fellow
      Douglas P. Verret portrait placeholder
      Term 2
      TXUSA
      Phone 1:
      +1 832-595-4208

  • 2019 Elected Members

    • Joachim N. Burghartz
      Joachim N. Burghartz portrait
      Term 1
      Institute for Microelectronics Stuttgart (IMS CHIPS)
      Director and Chairman of the Board
      StuttgartGermany
      Phone 1:
      +49 0 711 21855 200

      Fax:
      +49 0 711 21855 222
      Joachim N. Burghartz is an IEEE Fellow, an IEEE Distinguished Lecturer, recipient of the 2014 EDS J.J. Ebers Award, and has been an ExCom member of the IEEE Electron Devices Society. He received his MS degree from RWTH Aachen in 1982 and his PhD degree in 1987 from the University of Stuttgart, both in Germany. From 1987 thru 1998 he was with the IBM T. J. Watson Research Center in Yorktown Heights, New York, where he was engaged in early development of SiGe HBT technology and later in research on integrated passive components, particularly inductors, for application to monolithic RF circuits. From 1998 until 2005 he was with TU Delft in the Netherlands as a full professor and from 2001 as the Scientific Director of the Delft research institute DIMES. In fall 2005 he moved to Stuttgart, Germany, to head the Institute for Microelectronics Stuttgart (IMS CHIPS). In addition he is affiliated with the University of Stuttgart as a full professor. More recently, he also became CEO of the IMS Mikro-Nano Produkte GmbH. Dr. Burghartz has published about 350 reviewed articles and holds more than 30 patents.

      Distinguished Lecture Titles
      -Hybrid Systems in Foil
      -Ultra-thin chip technology
      -GaN technologies for power and RF
    • Ru Huang
       - MOS Devices and Technology
      Ru Huang portrait
      Term 2nd term
      Peking University
      Institute of Microelectronics
      Beijing 100871
      China
      Phone 1:
      86 10 6275 7761

      Fax:
      86 10 6275 1789 -7761
      Ru Huang (M’98–SM’06) received the B.S. (highest honors) and M.S. degrees in electronic engineering from Southeast University, Nanjing, China, in 1991 and 1994, respectively, and the Ph.D. degree in microelectronics from Peking University, Beijing, China, in 1997.
      In 1997, she joined the faculty of Peking University, where she is currently a Professor and the Head of the Department of Microelectronics. Since 2000, she has been the leader of several State Key Research Projects of China in device research and IC fabrication technology research, including major state basic research projects, 863 national projects, the key project from National Natural Science Foundation, as well as several collaborative projects with Samsung, Intel and Fujitsu Corporations. Her research interests include nano-scaled CMOS devices, nonvolatile memory devices and new devices for RF and harsh environment applications. She holds 21 granted patents, and has authored/co-authored 4 books and over 180 papers, including many conference invited papers. Dr. Huang is the winner of the National Science Fund for Distinguished Young Scholars and many other awards in China, including the National Youth Science Award, Science and Technology Progress Award from Ministry of Information Industry and Ministry of Education. She serves as a member of IEEE Electron Devices Society (EDS) AdCom and the associate chief editor of Science in China. She was the Technical Program Co-Chair of the 7th and 9th International Conference on Solid State and Integrated Circuit Technology (ICSICT 2004 and 2008), a Far East Committee Member of the 2004 International Solid State Circuits Conference (ISSCC), and committee members of many other international conferences and symposiums.
    • Shuji Ikeda
      Shuji  Ikeda portrait
      Term 1st
      Tei Solutions, Co. Ltd.
      NIRC
      16-1 Onogawa
      Tsukuba, Ibaraki 305-8
      Japan
      Phone 1:
      +81 29 849 1276

      Fax:
      +81 29 849 1533

      Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.

    • Meyya Meyyappan
       - Fellow
      Meyya  Meyyappan  portrait
      Term 1st
      NASA Ames Research Center
      Center for Nanotechnology
      Mailstop 229-3
      Moffett Field, CA 94035
      USA
      Phone 1:
      +1 650 604 2616

      Fax:
      +1 650 604 5244
      Lecture Topics: 1. An overview of recent developments in Nanotechnology

      2. Nanotechnology in nanoelectroncis, optoelectronics and sensor development

      3. Carbon based electronics

      4. Nanotechnology: development of practical systems and nano-micro-macro integration.
    • Arokia Nathan
       - Fellow
      Arokia  Nathan portrait
      Term 1st term
      Cambridge Touch Technologies
      154 Science Park Milton Road
      Cambridge CB4 0GN
      United Kingdom of Great Britain and Northern Ireland
      Phone 1:
      +44 1223 748302

      Fax:
      +44-7886831216
      Arokia Nathan holds the Professorial Chair of Photonic Systems and Displays in the Department of Engineering, Cambridge University. He received his PhD in Electrical Engineering from the University of Alberta. Following post-doctoral years at LSI Logic Corp., USA and ETH Zurich, Switzerland, he joined the University of Waterloo where he held the DALSA/NSERC Industrial Research Chair in sensor technology and subsequently the Canada Research Chair in nano-scale flexible circuits. He was a recipient of the 2001 NSERC E.W.R. Steacie Fellowship. In 2006, he moved to the UK to take up the Sumitomo Chair of Nanotechnology at the London Centre for Nanotechnology, University College London, where he received the Royal Society Wolfson Research Merit Award. He has held Visiting Professor appointments at the Physical Electronics Laboratory, ETH Zürich and the Engineering Department, Cambridge University, UK. He has published over 500 papers in the field of sensor technology and CAD, and thin film transistor electronics, and is a co-author of four books. He has over 50 patents filed/awarded and has founded/co-founded four spin-off companies. He serves on technical committees and editorial boards in various capacities. He is a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), Fellow of IEEE (USA), and an IEEE/EDS Distinguished Lecturer.

      Lecture Topics:

      OLED Displays
      Flexible Electronics
      Device-Circuit Interactions
      Interactive Displays
    • Jacobus W. Swart
       - Senior Member
      Jacobus W.  Swart portrait placeholder
      Term 2nd term
      FEEC/UNICAMP - State University of Campinas
      Av. Albert Einstein 400
      Campinas, Sao Paul 13.083-970
      Brazil
      Phone 1:
      +55 19 3746 6001

      Lecture Topics: MEMS, sensors, ISFET, CNT and graphene, Advanced CMOS processes
    • Bin Zhao
       - Fellow
      Bin Zhao portrait
      Term 1st term
      ON Semiconductor
      32 Discovery, Suite 100
      Irvine, CA 92618
      USA
      Phone 1:
      +1 949 266 6800

      Fax:
      +1 614 737 6800

      Lecture Topics:


      > Analog/Mixed-Signal/RF IC and Enabling Technologies
      > High Performance VLSI Interconnect