Student Fellowship Committee

  • Student Fellowship Committee Chair

    • Mansun J. Chan
      Mansun J.  Chan portrait
      Hong Kong University of Science and Tech.
      Dept. of Electronic and Computer Eng.
      Clear Water Bay, Kowloon, Hong Kong
      Phone 1:
      +852 2358 8519

      Fax:
      +852 2358 1485
      Email 1:
      mchan@ust.hk

      Lecture Topics:  1) Nano-device physics and technology 2) Device modelling and circuit simulation 3) Non-volatile memory technology 4) Bio-sensors and circuits MANSUN CHAN received his MS and Ph.D. from the University of California at Berkeley. He is currently a Professor at the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). His main research covers novel silicon device fabrication and modeling. In particular, he is one of the key developers of the BSIM model series that have been selected to be the industrial standard models for conventional and SOI MOSFETs used by the semiconductor industry worldwide. Prof. Chan has served IEEE in various capacities and he is currently a Distinguished Lecturer of IEEE EDS.


      Biography:  Mansun Chan (S’92-M’95-SM’01-F’13) received Ph.D. degrees from the UC, Berkeley in 1995. He is one of the major contributors to the unified BSIM model for SPICE, which has been accepted by most US companies and the Compact Model Council (CMC) as the first industrial standard MOSFET model. In January 1996, he has joined the EEE faculty at Hong Kong University of Science and Technology.  After that, he developed a SOI MOSFET model, which has been adopted by UC Berkeley as the core of the BSIMSOI model.  Between July 2001 and December 2002, he was a Visiting Professor at University of California at Berkeley and the Co-director of the BSIM program.  In this capacity, he has successfully completed the technology transfer of BSIM3SOI to be the first industrial standard SOI MOSFET model.  In addition to device modeling, Prof. Chan’s current research interests also include nano-transistor fabrication technology, carbon-based device physics, printable transistors, 3D integrated circuits, bio-sensors and cloud computing based simulation platform.  He is current working on an interactive modeling and online simulation (i-MOS) platform to facilitate the interactions between model developers and circuit designers using the Internet technology.


      Prof. Chan is a recipient of the UC Regents Fellowship, Golden Keys Scholarship for Academic Excellence, SRC Inventor Recognition Award, Rockwell Research Fellowship, R&D 100 award (for the BSIM3v3 project), Teaching Excellence Appreciation award, Distinguished Teaching Award and the Shenzhen City Technology Innovation Award by the Chinese Government. He is a Fellow and Distinguished Lecturer of IEEE.

  • Student Fellowship Committee Members

    • Patrick Fay
       - Compound Semiconductor Devices
      Patrick Fay portrait
      University of Notre Dame
      Department of Electrical Engineering
      261 Fitzpatrick Hall
      Notre Dame, IN 46556
      Phone 1:
      (574) 631-5693

      Email 1:
      pfay@nd.edu

      Patrick Fay received a B.S. degree in Electrical Engineering from the University of Notre Dame in 1991, followed by the M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1993 and 1996, respectively. He joined the faculty of the Department of Electrical Engineering at the University of Notre Dame in 1997, where he currently a professor as well as the director of the Notre Dame Nanofabrication Facility. His research interests include the design, fabrication, and characterization of III-V microwave and millimeter-wave electronic devices and circuits, power devices, and high-speed optoelectronic devices and optoelectronic integrated circuits. His research also includes the development and use of micromachining techniques for the fabrication of microwave and millimeter-wave components and packaging. Prof. Fay was awarded the Department of Electrical Engineering’s Outstanding Teacher award in 1998 and 2018, and Notre Dame's College of Engineering’s Outstanding Teacher award in 2015. He is a fellow of the IEEE, and Electron Device Society Distinguished Lecturer, and serves as an associate editor of the IEEE Transactions on Components, Packaging and Manufacturing Technology, IEEE Transactions on Electron Devices, and IEEE Transactions on Microwave Theory and Techniques.

      Prof. Fay’s lecture topics include:
      - III-N Nanowire FETs for Low-Power Applications
      - Vertical GaN Devices and Epitaxial Lift-Off Processing for High Performance Power Applications
      - Advanced Tunneling-Based Devices for mm-Wave Sensing and Imaging
    • Mark S. Lundstrom
      Mark S.  Lundstrom portrait placeholder
      Purdue University
      Don and Carol Scifres Distinguished Professor
      207 South Martin Jischke Drive, HDLR Building
      West Lafayette, IN 47907-1791
      USA
      Phone 1:
      +1 765 494 3515

      Fax:
      +1 765 494 6441
    • Durga Misra
       - Senior Member
      Durga  Misra portrait placeholder
      NJ Institute of Technology
      Electrical and Comp. Eng. Department
      323 M L King Blvd.
      Newark, NJ 07102-1824
      USA
      Phone 1:
      +1 973 596 5739

      Lecture Topics:
      1. Challenges for Nanoelectronics: More Moore and More than Moore.
      2. High-k on High-Mobility Substrates: An interface Issue