J-EDS Editor-in-Chief and Editors

We are currently in the process of selecting a world-class editorial board to edit and approve manuscripts for inclusion in the J-EDS.

If you are interested in serving as a J-EDS editor, please contact the current Editor-In-Chief Mikael Östling for more information.

If you wish to be added to the list of potential reviewers the EDS database, please contact the EDS headquarters. Kindly provide your full name, email address, and area of expertise.

Click on the names below to read each editor's biography.

J-EDS Editorial Board

  • J-EDS Editor-in-Chief

    • Mikael Östling
       - Fellow
      Mikael  Östling portrait
      KTH, Royal Institute of Technology
      Dept of Microelectronics and InfoTech
      Electrum 229
      Kista SE-164 40
      Phone 1:
      +46 8 790 4301

      +46 8 752 7850

      Mikael Östling (M’ 85- F’04) received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He is currently department head of Integrated Devices and Circuits and was the dean of the School of Information and Communication Technology, KTH, between 2004–12. Östling was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. In 2005 he co-founded the company TranSiC, acquired in full by Fairchild Semiconductor 2011. He was awarded the first ERC grant for advanced investigators. His research interests are nanoscaled Si and Ge device technologies and emerging 2D materials, as well as device technology for wide bandgap semiconductors for high power / high temperature applications. He has supervised 35 PhD theses work and co -authored about 500 scientific papers published in international journals and conferences. Mikael Östling was an editor of the IEEE Electron Device Letters 2005-2014 and appointed vice president of EDS since 2014. Mikael is a Fellow of the IEEE.

      Lecture Topics: SiC Device Technology for energy efficiency and for high temperature operation Silicon Nanoscaled Device Technology

  • J-EDS Editors

    • David Abe
       - Vacuum Electron Devices
      David Abe portrait
      Naval Research Laboratory
      4555 Overlook Ave. S.W.
      Washington, DC 20375
      Phone 1:


      David K. Abe (M’88–SM’12) received the B.Sc. degree in engineering from Harvey Mudd College in 1981, M.S. in electrical engineering from the University of California, Davis in 1988, and Ph.D. in electrical engineering/electrophysics from the University of Maryland in 1992. Since 1997, he has been at the U.S. Naval Research Laboratory (NRL), Washington, DC, where he directs a multidisciplinary group of scientists and engineers as head of the Electromagnetics Technology Branch. The Branch carries out research and exploratory development on radio-frequency concepts, materials, devices, components, and circuits in the frequency range of 1 MHz to approximately 1 THz with focused efforts in wide and narrow bandgap semiconductor electronics, carbon-based and other novel lower dimensional electronic materials, tunable and reconfigurable materials and circuits, control components, electron emission physics, electron beam-wave interactions (vacuum electronics), and electromagnetic theory and computational techniques. Dr. Abe’s current research involves the generation of coherent microwave and millimeter-wave radiation resulting from the interaction of axially-streaming electron beams with novel electromagnetic structures, with a particular emphasis on multiple-beam devices. Prior to NRL, Dr. Abe worked on interdisciplinary projects in pulsed power, explosive-driven magnetic flux compression, high power microwave generation, and electromagnetic effects at the Lawrence Livermore National Laboratory, Berkeley Research Associates, and the U.S. Army Research Laboratory (ARL), Adelphi, MD. He was a co-guest editor of the IEEE Transactions on Plasma ScienceTenth Special Issue on High Power Microwave Generation and co-edited the Proceedings of the 7th Workshop on High Energy Density and High Power RF (RF2005). He served as the Technical Chair of the IEEE International Conference on Vacuum Electronics (IVEC) in 2012 and as the General Chair of IVEC 2014. He is a member of the IEEE Electron Devices Society Technical Committee on Vacuum Electronics, was an elected member of the IEEE Nuclear and Plasma Sciences Society (NPSS) Administrative Committee from 2008 to 2011, and served multiple terms as an elected member of the NPSS Plasma Science and Applications Executive Committee (2005–2007, 2008–2011, 2013–2015). He was a recipient of a Thomas J. Watson Fellowship, two NRL Technology Transfer Awards, and numerous official commendations and distinguished contribution awards from the Army and Navy.

    • Constantin Bulucea
       - Life Fellow
      Constantin Bulucea portrait
      Distinguished Member of the Technical Staff
      Texas Instruments, Retired
      1374 Arleen Avenue
      Sunnyvale, CA 94087
      +1 408 738 9035

      +1 408 508 8120

      Constantin Bulucea (S'69–M'70–SM'88–F'04- LF'13) was born in Romania, where he received the M.S. and Ph.D. degrees in Electronics from thePolytechnic Institute of Bucharest in 1962 and 1974, respectively. In 1969, hewas granted a one-year government scholarship at the University of California, Berkeley,where he received a M.S. degree in Electrical Engineering. His activeprofessional career spanned 50 years, equally split across the Romanian and USsemiconductor histories.

      In Romania, Dr. Bulucea was the scientific director anddirector of the R&D Institute for Electronic Components (ICCE) between 1974and 1986, with assignments of national importance, such as the introduction ofsilicon transistor technology and the development of the process technology forthe Microelectronica MOS/VLSI plant. From that period, his personal legacy includes the creation of theAnnual Conference for Semiconductors (CAS), now an international IEEE event, agraduate course and a book on Linear Integrated Circuits and reference paperson surface breakdown and hot-carrier injection in silicon, originallycommunicated at IEDM and later published in the IEEE Transactions on ElectronDevices and Solid-State Electronics.

      In the US, Dr. Bulucea remained on the technical side of thesemiconductors business, so enjoying the last years of Silicon Valley's "HappyScaling". In particular, at NationalSemiconductor, he was the architect of company's 0.25, 0.18, and 0.13 µm CMOSprocesses for analog and mixed-signal applications. Before that, he brought to completionSiliconix's device/process architecture for the next generation of trench powerDMOS transistors, which became an industry standard in the followingyears. He has been active on the R&Darena as a direct contributor and also as the 2003 chairman of the Advanced Devicesand Technologies thrust of the Semiconductor Research Corporation (SRC) and asa member of the Technical Committees of the Bipolar Circuits and TechnologyMeeting (BCTM) and of the VLSI Technology Symposium. Between 2004 and 2012 hewas the editor of IEEE Electron Device Letters (EDL) for analog andmixed-signals technology. Dr. Bulucea has published over 50 technical articlesin international journals and holds 67 US patents with several others pending.

      In 2001 Dr. Bulucea was elected an Honorary Member of theRomanian Academy and in 2004 became an IEEE Fellow "for contributions totransistor engineering in the area pf power electronics". In 2011, he became aDistinguished Member of the Technical Staff of Texas Instruments (TI), as aresult of TI's acquisition of National Semiconductor. Dr. Bulucea retired from TI next year, on his72nd birthday, continuing to support company's patent applications that he had authored.

      Lecture Topics:

      1. “Physics and Technology of Sub-0.25-mm CMOS Devices” (UC Davis Seminar, 2001).

      2. “Electronic Properties of Silicon and other <Known Materials>” (Stanford Center for Integrated Research, 2003).

      3. “TCAD Revisited – An Engineer’s Point of View” – Excellence in Computer Simulation Symposium of the Network for Computational Nanotechnology (UC Berkeley, 2007).

      4. “Devices and Processes for Mixed Signals” (UC San Diego Seminar, 2003 and 2010). 

      5. Eastern Europe’s Semiconductor Technology - Recollections and Projections (Keynote Address, ESSDERC/ESSCIRC, Bucharest 2013).

    • Subhananda Chakrabarti
      Subhananda Chakrabarti portrait placeholder
      Indian Institute of Technology-Bombay
      Dept. of Electical Engineering
      Mumbai 400 076
      Phone 1:
      91-22-2576 7421 (O)

      Phone 2

      Subhananda Chakrabartir received his M.Sc. and Ph.D. degrees from the Department of Electronic Science, University of Calcutta, Kolkata, India in 1991 and 2000, respectively. He was a Lecturer in the Dept. of Physics, St. Xavier’s College, Kolkata. He has been a Senior Research Fellow with the University of Michigan, Ann Arbor, from2001 to 2005, a Senior Researcher with Dublin City University, Dublin City, Ireland, from 2005 to 2006, and a Senior Researcher (RA2) with the University of Glasgow, Glasgow, U.K., from 2006 to 2007. He joined as an Assistant Professor in the Department of Electrical Engineering, IIT Bombay, Mumbai, India, in 2007.Presently, he is a Professor in the same department. He has extensively researched in molecular beam epitaxial(MBE) growth, characterization, and fabrication of compound (III-V) GaAs-based semiconductor optoelectronic materials and devices, such as intersubband infrared photodetectors etc. He has been the first to demonstrate complete indigenous development Infrared Photodetector based Focal Plane Array in India. In II-VI (ZnO) based research, he has demonstrated stable p-doping through Plasma Immersion Ion Implantation (PIII) technique and subsequently demonstrated a homojunction ZnO-based UV-LED. He is a fellow of the Institution of Electrical and Telecommunication Engineers (IETE) India, Member of the IEEE, MRS USA, SPIE USA etc. He is the medal recipient of the Materials Research Society of India. Recently, he was awarded NASI-Reliance Industries Platinum Jubilee Award for Application Oriented Innovations in Physical Sciences for the year 2016. He has authored more than 200 papers in international journals and conferences. He has also co-authored a couple of book chapters on intersubband quantum dot detectors. His four (4) research monographs with Springer are in press. Dr. S. Chakrabarti has served as reviewer for a number of international journals of repute such as Applied Physics Letters, Nature Scientific Report, IEEE Photonics Technology Letters, IEEE Journal of Quantum Electronics, Journal of Alloys and Compound, Material Research Bulletin etc.
    • Mansun J. Chan
      Mansun J.  Chan portrait
      Hong Kong University of Science and Tech.
      Dept. of Electronic and Computer Eng.
      Clear Water Bay, Kowloon, Hong Kong
      Phone 1:
      +852 2358 8519

      +852 2358 1485
      Email 1:

      Lecture Topics:  1) Nano-device physics and technology 2) Device modelling and circuit simulation 3) Non-volatile memory technology 4) Bio-sensors and circuits MANSUN CHAN received his MS and Ph.D. from the University of California at Berkeley. He is currently a Professor at the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). His main research covers novel silicon device fabrication and modeling. In particular, he is one of the key developers of the BSIM model series that have been selected to be the industrial standard models for conventional and SOI MOSFETs used by the semiconductor industry worldwide. Prof. Chan has served IEEE in various capacities and he is currently a Distinguished Lecturer of IEEE EDS.

      Biography:  Mansun Chan (S’92-M’95-SM’01-F’13) received Ph.D. degrees from the UC, Berkeley in 1995. He is one of the major contributors to the unified BSIM model for SPICE, which has been accepted by most US companies and the Compact Model Council (CMC) as the first industrial standard MOSFET model. In January 1996, he has joined the EEE faculty at Hong Kong University of Science and Technology.  After that, he developed a SOI MOSFET model, which has been adopted by UC Berkeley as the core of the BSIMSOI model.  Between July 2001 and December 2002, he was a Visiting Professor at University of California at Berkeley and the Co-director of the BSIM program.  In this capacity, he has successfully completed the technology transfer of BSIM3SOI to be the first industrial standard SOI MOSFET model.  In addition to device modeling, Prof. Chan’s current research interests also include nano-transistor fabrication technology, carbon-based device physics, printable transistors, 3D integrated circuits, bio-sensors and cloud computing based simulation platform.  He is current working on an interactive modeling and online simulation (i-MOS) platform to facilitate the interactions between model developers and circuit designers using the Internet technology.

      Prof. Chan is a recipient of the UC Regents Fellowship, Golden Keys Scholarship for Academic Excellence, SRC Inventor Recognition Award, Rockwell Research Fellowship, R&D 100 award (for the BSIM3v3 project), Teaching Excellence Appreciation award, Distinguished Teaching Award and the Shenzhen City Technology Innovation Award by the Chinese Government. He is a Fellow and Distinguished Lecturer of IEEE.

    • Steve S. Chung
       - Fellow
      Steve S.  Chung portrait
      National Chiao Tung University
      Dept. of Electronics Engineering
      1001 University Road
      Hsinchu 300
      Phone 1:
      +886 3 5731830

      +886 3 5734608

      Lecture Topics:  1. The Variability Issues of Small Scale CMOS Devices 2. Extension of Moore's Law Via Strained Technologies 3. Fundamentals of RTN and Its applications to CMOS and Nonvolatile Memories 4. Random Dopant Variations of Trigate CMOS Devices

      Biography:  STEVE S. CHUNG (S'83-M'85-SM'95-F'06) received his Ph.D. degree from the University of Illinois at Urbana-Champaign, in Electrical Engineering in 1985. His Ph.D. thesis advisor is the world-famous scholar and CMOS Co-Inventor, Prof. C. T. Sah.

      Currently, he is a Chair Professor and UMC Research Chair Professor at the National Chiao Tung University (NCTU).  After joining NCTU in 1987, he has been the first Department Head of EECS Honors Program, to promote an undergraduate program for academic excellence from 2004-2005. Later, he was also the Dean of International Affairs Office, Executive Director of school level research center, between 2007-2008. He was a Research Visiting Scholar with Stanford University in 2001, visiting professor to University of California-Merced in 2009-2010, and a guest lecturer at Stanford in the Fall of 2009. He was also the consultant to the two world largest IC foundries, TSMC and UMC, on developing CMOS and flash memory technologies. His recent current research areas include- nanoscale CMOS devices and technology; nonvolatile memory technology and reliability; and reliability physics/interface characterization. He has published more than 220 journal and conference papers, one textbook, and holds more than 20 patents. Since 1995, he has presented more than 22 times in the IEEE flagship conferences, IEDM and VLSI. In particular, he was the first (from Taiwan) to present the paper at VLSI Technology symposium in 1995.

      He is an IEEE Fellow, the current IEEE EDS BoG(Board of Governor) member, IEEE Distinguished Lecturer, EDS Regions/Chapters Chair, and with past involvement as EDS AdCom member (2004-2009), EDS Regions/Chapters Vice-Chair, Guest Editor of TDMR, and Editor of EDL(2002-2008). He has served on various IEEE conference committees, e.g., VLSI Technology, IEDM, IRPS, IPFA, ICMTS, SNW, VLSI-TSA etc. Also, he has served as the TPC Vice-Chair and subsequently the organizing member of SSDM in Japan. ED Taipei chapter was awarded the 2002 EDS Chapter of the Year Award under his leadership as the chapter chair. He was awarded 3 times outstanding Research Award, distinguished PI, and distinguished NSC Research Fellow, from the National Science Council, as well as Distinguished EE Professor and Engineering Professor of the Engineering Societies in Taiwan. More recently, he was also honored the recipient of 2013 Pan Wen Yuan award in recognizing his outstanding achievements in the semiconductor research.

    • Shuji Ikeda
      Shuji  Ikeda portrait
      Tei Solutions, Co. Ltd.
      16-1 Onogawa
      Tsukuba, Ibaraki 305-8
      Phone 1:
      +81 29 849 1276

      +81 29 849 1533

      Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.

    • M.Jagadesh Kumar
       - Senior Member
      M.Jagadesh  Kumar portrait
      Indian Institute of Technology, Delhi
      Professor of Electrical Engineering
      Hauz Khas, New Delhi 110016
      Phone 1:
      +011-2659 1085

      Phone 2
      +011-2659 1959

      Lecture Topics: 1) Nanowire electronics: the future of CMOS technology 2) Green Transistors for energy efficient integrated circuits 3) Can Bipolar Transistors be made without doping? 4) Tunnel field effect transistors: Design and Optimization 5) Trench power MOSFETs: Design and Optimization 6) Perspectives on the evolution of semiconductor manufacturing: Enabling the impossible

      Dr. Kumar is currently the NXP (Philips) Chair Professor established at IIT Delhi by Philips Semiconductors, Netherlands (now NXP Semiconductors India Pvt Ltd). He was the Co-ordinator of VLSI Design, Tools and Technology interdisciplinary program. He is a Chief Investigator of the Nano-scale Research Facility (NRF) at IIT Delhi. Dr. Kumar received the 2013 Award for Excellence in Teaching (in large class category) from IIT Delhi. He works in the area of Nanoelectronic Devices, Device modeling and simulation, IC Technology and Power semiconductor devices. He has published extensively in the above areas with four book chapters and more than 160 publications in refereed journals and conferences. He is on the Editorial Board of Scientific Reviews, an online and open access primary research publication from the publishers of Nature. He is an Editor of IEEE Transactions on Electron Devices and the Editor-in-Chief of IETE Technical Review. Dr. Kumar is a Fellow of Indian National Academy of Engineering, The National Academy of Sciences, India, and The Institution of Electronics and Telecommunication Engineers, India. He has been awarded the 29th IETE Ram Lal Wadhwa Gold Medal for distinguished contribution in the field of Semiconductor device design and modeling. He has received the first ever ISA-VSI TechnoMentor Award given by the India Semiconductor Association to recognize a distinguished Indian academician and researcher for playing a significant role as a mentor and researcher. He is a recipient of 2008 IBM Faculty award in recognition of professional achievements. He has delivered a number of invited lectures in conferences and workshops in India and abroad to large audiences on topics related to Nanoelectronics. For more details on Dr. Kumar, you can visit http://web.iitd.ac.in/~mamidala

    • Ming Liu
       - Senior Member
      Ming Liu portrait
      Director - Lab of Nano-fabrication and Novel Device Integration Technology
      Institute of Microelectronics, CAS
      No.3, Bei-Tu-Cheng West Road
      Beijing 100029
      Phone 1:

      Lecture Topics: nano-fabrication, advanced memory device (charge trap memory, nanocrystal floating gate and resistive switching memory device), nano-electronic device and integrated technology, molecular electronic device and its integration
    • Colin McAndrew
      Colin McAndrew portrait
      Freescale Semiconductor
      2100 East Elliot Road
      MD EL-317
      Tempe, AZ 85284
      Phone 1:
      +1 480 413 3982

      Colin McAndrew (S'82-M'84-SM'90-F'04) received the Ph.D. and M.A.Sc. degrees in Systems Design Engineering from the University of Waterloo, Waterloo, Ontario, Canada, in 1984 and 1982 respectively, and the B.E. (Hons) degree in Electrical Engineering from Monash University, Melbourne, Victoria, Australia, in 1978. From 1978 to 1980 and from 1984 to 1987 he was with the Herman Research Laboratories of the State Electricity Commission of Victoria, Australia. From 1987 to 1995 he was at AT&T Bell Laboratories, Allentown PA. Since 1995 he has been with Freescale Semiconductor (formerly Motorola Semiconductor Products Sector), Tempe AZ, where he is a Fellow of the Technical Staff. His work is primarily on compact and statistical modeling and characterization for circuit simulation. He was a recipient of the Ian Langlands Medal from the Institute of Engineers of Australia in 1978, best paper awards for ICMTS in 2012 and 1993 and CICC in 2002, and the BCTM Award in 2005. He is a Fellow of the IEEE, was an editor of the IEEE Transactions on Electron Devices from 2001 through 2010, and is or has been on the technical program committees for the IEEE BCTM, ICMTS, CICC, and BMAS conferences. 
    • Kirsten Emilie Moselund
      Kirsten Emilie  Moselund portrait
      IBM Research GmBH Science and Technology
      Saümerstr. 4
      Zurich CH-8803
      Phone 1:
      +41-44 724 8992

      Kirsten Emilie Moselund received the M.Sc. degree in engineering from the Technical University of Denmark in 2003 and the Ph.D. degree in microelectronics from the Swiss Federal Institute of Technology in Lausanne (EPFL), Lausanne, Switzerland, in 2008. In 2008, she joined the IBM Zurich – Research, where she is currently managing the Materials Integration and Nanoscale Devices group, which among other things focuses on the development of new devices for ultra-low power electronics, in particular on their experimental demonstration in the BRNC Nanotechnology Center. Her research interests include nanofabrication technology, semiconductor physics, nanophotonics and novel electronic and photonic device concepts.
    • Stanislav Moshkalev
      Stanislav Moshkalev portrait
      State University of Campinas

      Stanislav A. Moshkalev (M`99) received the B.S. and M.S. degree in quantum electronics from St. Petersburg Polytechnic University, St. Petersburg, Russia, in 1975 and the Ph.D. degree in physics and chemistry of plasmas from A.F. Ioffe Physical-Technical Institute, Russian Academy of Sciences, St. Petersburg, Russia, in 1984.

      Since 1984, he held research positions in several scientific institutions in Russia, UK and Brazil. Since 1999, he has been a Researcher and since 2010, an Associate Director of the Center for Semiconductor Components, at the UNICAMP - State University of Campinas, Brazil. He is the coeditor of one book, and the author of more than 65 articles, and 5 inventions. His research interests include micro and nanofabrication and characterization, synthesis and characterization of carbon nanotubes and graphene, quantum dots, processing by focused ion, electron and laser beams, AFM, Raman spectroscopy, plasmas for etching and deposition, lithography, thin films, chemical, optical and bio sensors with ultralow power consumption, MEMS and NEMS, microfluidics, novel electron devices (memory, phototransistors, sensors) based on nanostructured carbon materials.

      Dr. Moshkalev is a member of IEEE, Brazilian Physical Society, Brazilian Microelectronics Society, and Brazilian Carbon Association. He is currently a coordinator of the Cooperative Research Network in Nanoinstrumentation (Brazil, CNPq - National R&D Council) and of the Associated Nanotechnology Laboratory of the Ministry of Science, Technology and Innovations (Brazil). Dr. Moshkalev’s awards and honors include the Researcher Fellowship from CNPq and the Distinguished Visiting Researcher Fellowship from IRCEP (the Queen´s University of Belfast, UK).


    • Arokia Nathan
       - Fellow
      Arokia  Nathan portrait
      Cambridge Touch Technologies
      154 Science Park Milton Road
      Cambridge CB4 0GN
      United Kingdom of Great Britain and Northern Ireland
      Phone 1:
      +44 7886831216

      Arokia Nathan holds the Professorial Chair of Photonic Systems and Displays in the Department of Engineering, Cambridge University. He received his PhD in Electrical Engineering from the University of Alberta. Following post-doctoral years at LSI Logic Corp., USA and ETH Zurich, Switzerland, he joined the University of Waterloo where he held the DALSA/NSERC Industrial Research Chair in sensor technology and subsequently the Canada Research Chair in nano-scale flexible circuits. He was a recipient of the 2001 NSERC E.W.R. Steacie Fellowship. In 2006, he moved to the UK to take up the Sumitomo Chair of Nanotechnology at the London Centre for Nanotechnology, University College London, where he received the Royal Society Wolfson Research Merit Award. He has held Visiting Professor appointments at the Physical Electronics Laboratory, ETH Zürich and the Engineering Department, Cambridge University, UK. He has published over 500 papers in the field of sensor technology and CAD, and thin film transistor electronics, and is a co-author of four books. He has over 50 patents filed/awarded and has founded/co-founded four spin-off companies. He serves on technical committees and editorial boards in various capacities. He is a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), Fellow of IEEE (USA), and an IEEE/EDS Distinguished Lecturer.

      Lecture Topics:

      Flexible electronics
      Thin film transistors
      Sensor interfaces
      OLED displays
    • Paolo Pavan
      Paolo Pavan portrait
      Universita di Modena e Reggio Emilia
      Dipartimento di Ingegneria "Enzo Ferrari"
      Via P. Vivarelli 10/1
      Modena, MO 41125
      Phone 1:

      Paolo Pavan graduated in Electronics Engineering at the University of Padova in 1990.
      From Aug. 1992 to May 1993 he was a “graduate student” at the University of California at Berkeley (USA); then, until May 1994, as “visiting research engineer”. He received his PhD from the University of Padova in 1994. He has been at the Univeristy of Modena and Reggio Emilia since 1994, first as Research Associate, then as Associate Professor in 1998 and Full Professor in 2004. At the University of Modena and Reggio Emilia he has been active in many fields: Dean of the Electronic Engineering Program from 2008 to 2016; Member of the Academic Senate from Nov. 2010 to July 2012 and actively contributed to many working groups and committees; from 2004 to Oct. 2008 he has been Deputy-Dean of the Facoltà di Ingegneria di Reggio Emilia, and the advisor for the Mechatronic Engineering Program. From 2005 to 2011 he has been the President of IU.NET, Consorzio Interuniversitario per la Nanoelettronica (Italian University Nano-Electronics Team), including research groups from Università di Bologna, Padova, Pisa, Ferrara, Udine, Calabria, “Sapienza” in Roma, Politecnico di Milano at that time.
      Since March 2012 he is Senior Member of the IEEE.

      In 1997-1999 he visited Saifun Semiconductors (Israel) for research activity on NROM, one of the first innovative charge trapping nonvolatile memories.
      His research interests are in the characterization, modeling and reliability of nonvolatile memories (Flash, Charge Trapping, PCM, resistive…) and innovative devices (III-V-MOS, FinFET). New characterization tecniques have been developed and coupled to physical modeling to achieve a deep unterstanding of device operations.
      He is also active in the industrial electronic applications field, namely “by-wire” and wireless embedded systems, energy harvesting devices and circuits.

      More than 90 papers on journals and conferences (many invited). One book and two book chapters.

      He has been Chairman of the Technical Committee “Nonvolatile and Programmable Device Reliability” in ESREF2002. In 2002 and 2003 he has been member of the Technical Sub-Committee “CMOS and Interconnect Reliability” of IEDM (IEEE International Electron Device Meeting) and he became Chairman in 2004; European Arrangement Chair of IEDM in 2005 and 2006. He has been Editor of a Special Issue on Nonvolatile Memories, IEEE Transactions on Device and Material Reliability, Sept. 2004. From 2006 to 2010 he has been member of the Technical Committee of the International Symposium on VLSI, Technology, Systems and Applications (VLSI-TSA) in Taiwan. From 2012 he is member of the Technical Committees of ESREF and ESSDERC. He is a member of the Technical Committee of IRPS (2014 and 2015). He has been the Technical Program Chair of ESSDERC 2014. He is the Guest Editor of the Special Issue of Solid State Electronics dedicated to ESSDERC 2014. He is currently a member of the Steering Committee of ESSDERC.

      He teaches Electronics at the Engineering Departments and more specific lectures for summer schools and masters (e.g. Short Course on “Alternative Nonvolatile Memories” International Symposium on VLSI, Technology, Systems and Applications (VLSI-TSA) in Taiwan, 2006; 3rd European “Sinano” Summer School in 2008; Master in Nanotechnologies - CIVEN (Coordinamento Interuniversitario Veneto per le Nanotecnologie) in 2009.

      He co-founded two spin-offs: embit s.r.l. in July 2004, and xbw s.r.l. in June 2006. Both companies work on industrial electronics applications for logistics and mechatronics applications.

      He is an active Reviewer for many International Journals (IEEE Transactions on Electron Devices, IEEE Electron Device Letters, IEEE Transactions on Device and Materials Reliability, Solid State Electronics, ... )

      Lecture Topics: Nonvolatile Memories, characterization and modeling of innovative devices
    • Unil Perera
      Unil Perera portrait
      Georgia State University
      Physics and Astronomy
      400 Science Annex
      Atlanta, GA 30303
      Phone 1:
      +1 404 413 6037

      Fax: +1 404 413 6025
      Dr. A. G. Unil Perera, obtained his bachelor's degree (Physics Special, 1st Class Honors) from the University of Colombo and MS and PhD from the University of Pittsburgh.  He is a tenured Full Professor in the Department of Physics & Astronomy at Georgia State University (GSU). His research focus is on developing novel multi band, bias and polarization selectable photon detectors covering a wide range from Ultraviolet to Far Infrared (Terahertz).  He has participated in various research workshops and has presented invited talks all over the world. He has written 6 book chapters and has contributed to the CRC dictionary of electronics, edited or co-edited several books on Infrared Detectors including a volume on thin film optical devices for a 5 volume handbook, served on NSF, DOE, and NASA review panels in addition to  reviewing numerous research proposals and papers. Dr. Perera has had over 150 technical articles published and has 5 patents to his credit. His work was featured in various Professional journals such as "Laser Focus World, Photonics Spectra, and the Reviews of Modern Physics". He was listed in Marquis WHO'S WHO in America since 2006, the Diamond Anniversary edition.  Dr. Perera founded and successfully managed a startup company commercializing detector technologies developed in his laboratory with a license from GSU. He is the recipient of several professional research and teaching awards including the Alumni Distinguished Professor award from GSU in 2010. He is a Life Fellow of the American Physical Society and a Life Fellow of the Society of Photo-Instrumentation Engineers, a Fellow of the Institute of Electrical and Electronics Engineers and a Fellow of the IEEE Photonics Society.  
    • M.K. Radhakrishnan
       - Senior Member
      M.K.  Radhakrishnan portrait
      NanoRel Technical Consultants
      273, 18D Main, 6th Block
      Koramangla, Bangalore 560095
      Phone 1:
      +65 9624 7575

      Phone 2
      +91 9447663869

      Lecture Topics:MK Radhakrishnan (M’82, SM’94, LSM’18) is the Founder Director of NanoRel LLP -Technical Consultants providing analysis-based solutions to micro and nano electronic industries for improving reliability of devices. As a researcher in the area of semiconductor device failure physics for more than 35 years, he worked with industries (ST Microelectronic and Philips), research institutions (Institute of Microelectronics, Singapore and Indian Space Research Organization) and in academia with National University of Singapore. As a technical consultant he works with many MNCs and also provides training on device failure analysis & reliability to various Industries, Universities and Research Centres.

      Lecture Topics
      1. Circa 70 – Semiconductor Device Progression and Challenges towards Nanoera.
      2. Interface Physics and Analysis Challenges in Silicon Nanodevices
      3. Are the Progressions towards the “Benefit of Humanity”? - A Failure Analyst’s View

    • Susanna Reggiani
       - Associate Professor
      Susanna Reggiani portrait
      University of Bologna
      Susanna Reggiani is Associate Professor at the Faculty of Engineering of the
      University of Bologna, Italy. She received the Ph.D. degree in Electrical
      Engineering from the University of Bologna in 2001. Since 2001 she is with the
      Department of Electronics and with Advanced Research Center for Electronic
      Systems (ARCES) of the University of Bologna.

      Her scientific activity has been devoted to the physics, modeling and characterization of electron devices, with special emphasis on transport models
      in semiconductors. Since 2007 she has been involved in Projects dealing with the TCAD analysis of power MOSFETs, modeling and characterization of hotcarrier stress degradation, modeling of package influences on high-voltage semiconductor FETs, TCAD study of the reliability of GaN-on-Si HEMTS. She is currently involved in European Projects on the development of physically-based models for SiC-based power devices and Smart Power integrated devices.
    • Tian-Ling Ren
       - Senior Member
      Tian-Ling  Ren portrait
      Tsinghua University
      Institute of Microelectronics
      Beijing 100084
      Phone 1:
      +86 10 6278 9151

      Phone 2
      Ext. 311

      Lecture Topics: New Material Based Micro/Nano Devices Flexible Electronics Novel Acoustic and RF Devices Non-volatile Memory

      Biography: Tian-Ling Ren received his Ph.D. degree in solid-state physics from Department of Modern Applied Physics, Tsinghua University, China in 1997.

      He is full professor of Institute of Microelectronics, Tsinghua University since 2003. He has been a visiting professor at Electrical Engineering Department, Stanford University from 2011 to 2012.

      For these years, Prof. Ren’s research mainly focused on novel micro/nano electronic devices and key technologies, including nonvolatile memories (RRAM, FeRAM), RF devices (resonator, inductor), sensors, and MEMS. Prof. Ren’s main contributions are that he has developed the new integration methods for novel material based micro/nano device and circuit applications. For examples, he proposed the RRAM structure with integration of single layer graphene, which can drastically decrease the power consumption of the device; he developed the ferroelectric thin film based integrated acoustic devices; he also proposed the graphene sound source devices for the first time; and he realized the high quality ultra-flexible structured RF resonators with very promising applications. He has published more than 300 journal and conference papers. He has more than 40 patents.

      He has been an Elected Member at Large, and Distinguished Lecturer of IEEE Electron Devices Society. He is also Council Member of Chinese Society of Micro/Nano Technology. For these years, Prof. Ren has been the technical committee member for several leading international conferences, including International Electron Device Meeting (IEDM), and Device Research Meeting (DRC). He is also editorial board member of Scientific Reports (Nature Publishing Group).

    • Enrico Sangiorgi
       - Fellow
      Enrico Sangiorgi portrait
      University of Bologna
      Via Fontanelle 40
      Forli 47100
      Phone 1:
      +39 0543 374418

      Enrico Sangiorgi (F’05) received the Laurea degree in electrical engineering from the University of Bologna, Italy, in 1979. In 1983, 1984, and 1991, he was a Visiting Scientist at the Center for Integrated Systems, Stanford University, Stanford, California, for approximately three years. From 1985 to 2001, he was a consultant at Bell Laboratories, Murray Hill, NJ, where he was a Resident Visitor for more than three years. In 1993, he was appointed Full Professor of Electronics at the University of Udine, Italy, where he started the Electrical Engineering Program and the microelectronic group. In 2002, he joined the University of Bologna, where he is currently in charge of the nanomicro- electronics group at the Campus of Cesena. From 2005 to 2011 he has been the Director of Consorzio Nazionale Interuniversitario per la Nanoeletronica (IU.NET – Italian Universities Nanoelectronic Team), a Legal Consortium grouping nine University Groups active in the field of Nanoelectronics. In 2005 he has been appointed member of the CATRENE Scientific Committee. Since 2006 he is the Vice Chairman of the Scientific Community Council (SCC) of ENIAC (the European Nanoelectronics Initiative Advisory Council). In 2007 he has been appointed member of the Steering Board of AENEAS, the private section of the ENIAC European Technology Platform. In 2008 he has been appointed CEO of Rinnova srl., a new company founded by the University of Bologna aiming to bring research and innovation to SME’s. From 2008 to 2012 he has been the Dean of the Second School of Engineering at the University of Bologna. In 2012 he has been appointed Director of the Department of Electrical and Electronic Engineering – Guglielmo Marconi – of the University of Bologna. Since 2014 he is the Director of the SINANO Institute, International Organization grouping 23 European Institutions active in the field of nanoelectronics.

      From 1994 to 2009 he has been Editor of IEEE Electron Device Letters. He has been the Guest Editor of several Special Issues on major scientific journals such as IEEE Transactions on Electron Devices, Solid State Electronics, etc. He has been a member of the Technical Committees of several International Conferences on Electron Devices: IEDM (’91-96; ’04-’06), ESSDERC (‘99-present), INFOS (’95-03), ULIS (’00-‘08), etc. Since 2011 he is a member of the Steering Board of the IEEE Journal of Photovoltaics.

      Enrico Sangiorgi is a Fellow of the IEEE, Distinguished Lecturer of the Electron Device Society, he has been Chairman of the Electron Device Society TCAD Technical Committee from 2004 to 2011 member of the Cledo Brunetti Award Committee and Education Award Committee of the EDS. Since 2011 he is elected member of the EDS AdCom. Since 2013 he is a member of the EDS Fellows Evaluation Committee. He has been involved in several European Projects of the 5, 6, and 7 FP with Management Responsibilities, and he has acted as Project Reviewer for the European Commission. The research interests of Enrico Sangiorgi, developed in cooperation with research centers and companies such as Bell Labs., Philips, Infineon Tech., ST Microelectronics, IMEC, and CEA-LETI, include the physics, characterization, modeling, and fabrication of silicon solid-state devices and integrated circuits. In particular he has been working on several aspects of device scaling, its technological, physical, and functional limits, as well as device reliability for silicon CMOS and bipolar transistors. In order to tackle and eventually overcome the hurdles of device scaling, down to the ultimate physical and technological limits, he has devised and developed several original concepts and methods in the characterization and modeling of nanoscale silicon devices. Recently his interests included the physics and modeling of Photo-voltaics devices where he has worked on several aspects of device optimization. Enrico Sangiorgi coauthored 34 papers presented at the International Electron Devices Meeting (IEDM) Conference, and overall more than 250 papers on major journals and conference proceedings.

      Lecture Topics: Nanodevices modeling and simulation Photovoltaics devices and technologies Energy Harvesting devices, technologies and systems

    • Krishna Shenai, PhD
       - Senior Fellow
      Krishna Shenai, PhD portrait
      Computation Institute
      University of Chicago
      5735 South Ellis Avenue
      Chicago, IL 60637
      Phone 1:
      (630) 364-0759

      (239) 777-7835

      Krishna Shenai is a Senior Fellow at the Computation Institute, University of Chicago, Chicago, Illinois (USA) and an Adjunct Professor of electrical engineering and computer science at Northwestern University, Evanston, Illinois (USA). He earned the B. Tech. degree in electronics from IIT-Madras (India) in 1979, MS degree electrical engineering from The University of Maryland – College Park, MD (USA) in 1981, and the PhD degree in electrical engineering from Stanford University in 1986 with specialization in microelectronics and integrated circuit (IC) technologies. At Stanford his research focused on GaAs transistor physics and technology for high-speed IC and RF/microwave electronics. He also worked on developing refractory metal/silicide multi-level metallization based on CVD tungsten and tungsten silicide processes that provided the foundation technology for today’s silicon submicron ICs. He was a graduate student intern at the HP Labs in Palo Alto, CA while pursuing his doctoral degree studies.

      Prior to joining Stanford, Dr. Shenai was a member of the research team at COMSAT Labs in Clarksburg, MD that developed world’s first GaAs MMIC for broadband satellite communication where his research focused on cryogenically cooled microwave power amplifiers. He joined the GE Research Center in Schenectady, NY in 1986 and pioneered low-voltage silicon power MOSFETs, synchronous power rectifiers and high-density power supplies that set new industry standards and provided the foundation technology for manufacturing several commercial discrete and integrated silicon power products. He also proposed the use of wide bandgap (WBG) semiconductors for advanced power electronics and RF power amplifiers – a key technology that is expected to be the cornerstone of emerging 21st century energy economy. During 1990-1993, Dr. Shenai was the senior researcher in a team that developed the first two generations of Intel’s Pentium™ microprocessors with responsibilities for design and manufacturing of 0.5/0.35 micron CMOS/BiCMOS devices and mixed-signal circuits.

      Since 1993, Dr. Shenai has been in academia where he has developed and delivered over $80 million sponsored research to industry and government, produced three dozen graduate students with theses dissertations, and developed state-of-the-art educational curricula and research/teaching laboratories. In 1998, he founded and directed world’s first industry-government sponsored academic research consortium to investigate the field-reliability of compact computer/telecom power supplies. This research developed new accelerated testing methods and design guidelines to develop compact power supplies with 1 million hours of MTBF. Dr. Shenai’s academic research has provided foundation technologies for several industrial products that have been netting multi-billion dollar annual sales revenues. These include, for example, silicon RF power MOSFETs and power amplifier modules, high-voltage IGBTs, high-density reliable computer/telecom power supplies, adaptive power management of battery-operated wireless OEMs, WBG power devices and power converters, and WBG power amplifiers. Dr. Shenai also raised venture financing for two startup companies to commercialize his academic inventions and managed both companies to successful outcomes. While at Argonne National Labs during 2012-2014, Dr. Shenai led all R&D efforts in power electronics and architected DOE’s PowerAmerica Institute – the first and only NNMI on WBG power converters.

      In the last 40+ years as a researcher, teacher and entrepreneur Dr. Shenai has made seminal contributions to power semiconductor materials, devices and circuits. He has authored or co-authored over 400 peer-reviewed archived papers in top international journals and conference records, edited 3 books and 12 conference digests, and is a named inventor in 12 issued US patents. Dr. Shenai is one of the leading international authorities in solid-state power conversion and serves as a consultant on matters related to R&D and manufacturing, intellectual property, and technology commercialization. He is a Fellow of IEEE, a Fellow of the American Physical Society (APS), a Fellow of the American Association for the Advancement of Science (AAAS), and a foreign member of Academy of Engineering of Serbia (AES). Currently he serves as a Distinguished Lecturer of IEEE Power Electronics Society (PELS).

    • Rajendra Singh
       - Fellow
      Rajendra Singh portrait
      Clemson University
      Dept. of Electircal and Computer Engineering
      105 Riggs Hall, Box 340915
      Clemson, SC 29634-0915
      Phone 1:
      +1 864 656 0919

      +1 864 656 5910

      Rajendra Singh (S'75-M'78-SM'82-F'02) received the B.S. degree from Agrac University, Agra, India, in 1965, the M.S. degree in physics (electronics-wireless as the special subject) from the Meerut University, India, in 1968, the M.S. degree in physics (thesis on superconductivity) from the Dalhousie University, Halifax, NS, Canada, and the Ph.D. degree in physics (dissertation on solar cells) from McMaster University, Hamilton, ON, Canada, in 1979. Dr. Singh is currently D. Houser Banks Professor in the Department of Electrical and Computer Engineering and the Director of the Center for Silicon Nanoelectronics at Clemson University. With proven success in operations, project/program leadership, R&D, product/process commercialization, and start-ups, Dr. Singh is a leading semiconductor and photovoltaic (PV) and expert with over 33 years of industrial and academic experience of photovoltaic and semiconductor industries. The technology invented by Dr. Singh at Energy Conversion Devices (US Patent No. 4419533. South African Patent No. 830748; Great Britain Patent No. 2116364) is used in the manufacturing of amorphous thin film PV modules sold by United Solar. The technology invented by Dr. Singh (US Patens #.5, 820, 942, 1998& # 5, 980, 637, 1999) has been licensed to RTP tool manufacturer AG Associates (prototype tool developed in his Lab)...From solar cells to integrated circuits, he has led the work on semiconductor and photovoltaic device materials and processing by manufacturable innovation and defining critical path.

      He has published over 330 papers in various journals and conference proceedings. He is editor or coeditor of more than fifteen conference proceedings. He has presented over 50 keynote addresses and invited talks in various national and international conferences. He has served on a number of committees of various professional societies. Currently he is serving as Chair of IEEE Electron Devices Society Technical Committee on Semiconductor. 

      Part of Prof. Singh's awards and honors include IEEE distinguished Lecturer for Latin American on Solar Cells (Region 9) 1983, Distinguished Technologist United Nations Development Program (1987), IEEE Electron Device Society distinguished Lecturer (1994-2012), and outstanding Researcher Award, Clemson University, Sigma Xi Chapter (1997), five Clemson University awards for Faculty Excellence, Thomas D. Callinan Award of the Electrochemical Society (1998), J.F. Gibbons Award from the 11th IEEE International Conference on Advanced Thermal Processing of Semiconductors (2003), and the 2005 McMaster University Distinguished Alumni Award. Photovoltaics World (October 2010) selected him as one of the 10 Global "Champions of Photovoltaic Technology". He is Fellow of the Society of Optical Engineering, American Association for the Advancement of Science, and American Society of Metals, ASM.

      Lecture Topics: Photovoltaics as dominant electricity generation technology in 21st century sub 10 nm semiconductor manufacturing Wide Band Gap Based Semiconductor Manufacturing Bottom Up Based Nanostructures: Manufacturing challanges Nanosystems: Manufacturing Challanges and Opportunities 

    • Charles Surya
       - Optoelectronics Devices
      Charles Surya portrait
      Hong Kong Polytechnic University
      Electronic and Information Engineering
      Yuk Choi Road
      Hong KongHong Kong
      Phone 1:
      852 2766 6220

      852 2362 4711

      Charles Surya received his PhD in Electrical Engineering from the University of Rochester in 1987. From 1987 to 1994 he was associated with the Electrical and Computer Engineering Department of Northeastern University.  He joined the Electronic and Information Engineering (EIE) Department in 1994 and remained there since.  Professor Surya’s research interests are: optoelectronic materials and devices including MOCVD growth of GaN thin films and the study of GaN-based LEDs and UV detectors; growth of organic-inorganic hybrid perovskite materials and the fabrication of advanced perovskite based photovoltaic cells; and low-frequency noise in electron devices. Presently, Professor Surya is spearheading a collaborative effort between The Hong Kong Polytechnic University and the City of Dongguan, China for the establishment of an R&D Center on the study of photovoltaic materials, devices and systems.  He became a full professor of the Department in 2002andsince 2013hewas appointed Clarea Au Endowed Professor in Energy.  Professor Surya had served in various administrative posts including Associate Head of the EIE Department (2002-2005), Associate Dean of the Faculty of Engineering (2007 – 2010) and the Acting Dean of the Faculty of Engineering (2010 – 2012) of The Hong Kong Polytechnic University.  While serving as the Associate Dean and Acting Dean of the Faculty he was responsible for the implementation of outcome-based approach in the Engineering Faculty.  From 2007 – 2013 Professor Surya was the The Hong Kong Polytechnic University representative to the Hong Kong University Grants Council Panel for Outcome-based Education to oversee the implementation of Outcome-based Approach among the Engineering Faculties in Hong Kong.  He had been active in EDS and had served in various capacities including conference co-chair and chapter chair in the past.  He is presently serving as the Chairman of the Optoelectronic Devices Technical Committee.

    • Sam Vaziri
      Sam Vaziri portrait
      Stanford University
      Electrical Engineering
      Allen-X Room 302
      420 Via Palou Mall
      Stanford, CA 94305
      United States
      Phone 1:
      1 650 750 4571

      Sam Vaziri received the PhD in Nanoelectronics from KTH Royal Institute of Technology, Stockholm, in 2016. He holds dual MSc degrees: one in Nanotechnology from KTH, Stockholm, and one in Solid State Physics from K. N. Toosi University of Technology, Tehran. Currently, he has a postdoctoral research fellow position in the department of Electrical Engineering (EE) at Stanford University. In Pop Lab at Stanford, he is investigating electrical and thermal transport in two-dimensional (2D) materials and van der Waals heterostructures for novel device applications. His previous research activities encompass graphene based electronic and optoelectronic devices, such as vertical graphene-base transistors, as well as the integration of 2D materials into CMOS processes.

      Dr. Vaziri is a member of IEEE and Electron Devices Society Young Professionals Committee. He is the recipient of several professional research awards and fellowships including The Wallenberg Postdoctoral Research Fellowship (2016), IEEE Electron Devices Society PhD Student Fellowship (2014), and ESSDERC Best Young Scientist Paper Award (2015).

    • Carl-Mikael Zetterling
      Carl-Mikael Zetterling portrait
      KTH Royal Institute of Technology
      School of ICT
      Box Electrum 229
      Kista SE-16440
      Carl-Mikael Zetterling (S’91–M’97–SM’01) received the M.Sc.E.E. and Ph.D. degrees from the KTH Royal Institute of Technology, Stockholm, in 1991 and 1997, respectively. In 1997, he joined the Faculty of the School of Electrical Engineering, KTH. He is a Professor of Solid State Electronics since 2005, and since 2013 also Vice Dean of the School of Information and Communication Technology. From 1995 to 1996, he was an Invited Scholar at the Center for Integrated Systems, Stanford University, Stanford, CA. In 1998, he spent three months as an Invited Professor at Kyoto University, Japan, and again in 2001 for two months at Kyoto Institute of Technology, Japan.

      His field of research is process technology and device design of high voltage power devices and high temperature radiation hard analog and digital integrated circuits in SiC. He has coauthored around 260 internationally published articles and conference contributions, including editing one book about process technology for silicon carbide devices, and co-writing one book about plagiarism prevention with Jude Carroll. Prof. Zetterling has served in the Technical Program Committee for the TMS Electronic Materials Conference and the IEEE SISC Conference.