Distinguished Lecturer Listing

The EDS Distinguished Lecturer Program exists for the purpose of providing EDS Chapters with a list of quality lecturers who can potentially give talks at local EDS chapter meetings.

To arrange for a lecture, the EDS chapters should contact the individual directly.

For more information on the Program, please contact the EDS Executive Office (l.riello@ieee.org).

If you are an EDS DL and need to update your contact information, please click on the DL Contact Information Form.

All EDS DLs must perform 3 lectures for IEEE/EDS Chapters in a 2 year period in order to remain an active EDS DL.

  • Region 1 (Northeastern U.S.) - EDS Distinguished Lecturers

    • Anirban Bandyopadhyay
      Anirban Bandyopadhyay portrait placeholder
      Global Foundries
      29 Brookview Drive
      Carmel, NY 10512
      Phone 1:
      914 305 0324

      20 years of post-PhD academic and industry experience. Researched on III-V and silicon based high speed photonics and electronics devices at doctoral, post-doctoral & corporate R&D level. Managed cross-geo organizations while at Intel and IBM; built up a 100+ member Silicon Device & Technology Enablement division and led RF foundry strategic applications and marketing efforts at IBM and continuing the RF Strategic Applications leadership role at Globalfoundries.

      Distinguished Lecturer Titles:
      RF & mmWave devices/technologies/systems/communication including 4G/5G, WiFi, Fixed wireless, Satellite communication
      RF/mmWave/Optical Sensing
      RF System-on-chip
    • Mukta Farooq
       - Fellow
      Mukta Farooq portrait
      IBM Research
      T.J. Watson Research Center
      1101 Kitchawan Road
      Yorktown Heights, NY 10598
      Phone 1:

      Lecture Topics:  3D Technology Overview, 3D Integration and Die Stacking


      Dr. Mukta Farooq is a metallurgist and materials scientist, with expertise in 3-Dimensional and Heterogeneous Integration and Packaging, die and wafer level stacking, CMOS FET back end of line structures, flip-chip/C4/Cu pillar technology, lead-free alloys, chip package interaction, and intellectual property development.

      Mukta is currently the Heterogeneous Integration Leader for the AI Hardware Center at IBM Research. She has over 208 issued patents, and was named an IBM Lifetime Master Inventor and a member of the IBM Academy of Technology. She has received an outstanding technical achievement award for leadership in 3D Integration, and multiple high value patent awards. She has authored several external publications, given invited talks, and taught short courses.

      Mukta is an IEEE Fellow, a Distinguished Alumna of IIT Bombay, an EDS Distinguished Lecturer, Chair of the IEEE EDS Mid-Hudson Valley Chapter, and an active contributor to Women in Engineering. Mukta received her BS from IIT Bombay, MS from Northwestern University, and PhD from Rensselaer Polytechnic Institute.


    • Fernando Guarin
       - Fellow
      Fernando Guarin portrait
      Global Foundries
      Lecture Topics: Reliability and scaling of CMOS, SiGe Reliability  
    • Rajiv Joshi
       - Fellow
      Rajiv Joshi portrait placeholder
      Rt. 134, Kitchwan Rd
      Yorktown Heights, NY 10598
      Phone 1:

      Lecture Topics:  Variability aware Design, Low Power Circuits, Technology circuit co-design, High performance and low power memories

      Dr. Rajiv Joshi - Biography
      Dr. Rajiv V. Joshi is a research staff member and key technical lead at T. J. Watson research center, IBM. He received his B.Tech I.I.T (Bombay, India), M.S (M.I.T) and Dr. Eng. Sc. (Columbia University). His novel interconnects processes and structures for aluminum, tungsten and copper technologies which are widely used in IBM for various technologies from sub-0.5µm to 14nm. He has led successfully predictive failure analytic techniques for yield prediction and also the technology-driven SRAM at IBM Server Group. He commercialized these techniques. He received 3 Outstanding Technical Achievement (OTAs), 3 highest Corporate Patent Portfolio awards for licensing contributions, holds 58 invention plateaus and has over 225 US patents and over 350 including international patents. He has authored and co-authored over 185 papers. He received the Best Editor Award from IEEE TVLSI journal. He is recipient of 2015 BMM award. He is inducted into New Jersey Inventor Hall of Fame in Aug 2014 along with pioneer Nikola Tesla. He is a recipient of 2013 IEEE CAS Industrial Pioneer award and 2013 Mehboob Khan Award from Semiconductor Research Corporation. He is a member of IBM Academy of technology. He served as a Distinguished Lecturer for IEEE CAS and EDS society. He is IEEE, ISQED and World Technology Network fellow and distinguished alumnus of IIT Bombay. He is in the Board of Governors for IEEE CAS. He serves as an Associate Editor of TVLSI. He served on committees of ISLPED (Int. Symposium Low Power Electronic Design), IEEE VLSI design, IEEE CICC, IEEE Int. SOI conference, ISQED and Advanced Metallization Program committees. He served as a general chair for IEEE ISLPED. He is an industry liaison for universities as a part of the Semiconductor Research Corporation. Also he is in the industry liaison committee for IEEE CAS society.

    • Andreas Kerber
      Andreas Kerber portrait placeholder
      Global Foundries
      2070 Route 52
      Hopewell Junction 12533
      Phone 1:

      Andreas Kerber was born in Schnann, Austria. He received his Diploma in physics from the University of Innsbruck, Austria, in 2001 and a PhD in electrical engineering from the TU-Darmstadt, Germany in 2004 (granted with honors). He worked as an intern at Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA (1999-2000), at IMEC in Leuven, Belgium (2001-03) as Infineon Technologies assignee to International SEMATECH, for the Reliability Methodology Department at Infineon Technologies in Munich, Germany (2004-06), for AMD in Yorktown Heights, NY (2006-09), and as a Prinicpal Member of Technical Staff for GLOBALFOUNDRIES in Malta, NY (since 2009). Much of his work centered around Front-End-Of-Line (FEOL) reliability research with focus on metal gate / high-k CMOS technologies. He has co-authored over 100 papers in Journals and Conferences, is an IEEE senior member (since 2011) and an IEEE Distinguished Lecturer for the Electron Device Society (since 2016).
    • Ioannis (John) Kymissis
       - Molecular and Organic Devices
      Ioannis (John) Kymissis portrait
      Columbia University
      Electrical Engineering
      500 W120th Street Room 1300/MC 4712
      New York, NY 10027
      Phone 1:

      Phone 2

      Ioannis (John) Kymissis is an electrical engineer teaching at Columbia University. His area of specialization is solid state electronics and device fabrication, with an emphasis on thin film devices and the use of organic semiconductors in his work. He graduated with his SB, M.Eng., and Ph.D. degrees from MIT, and after working as a post-doc and at QDVison, joined the faculty at Columbia University in 2006. John has won a number of awards for his work, including the NSF CAREER award, the IEEE EDS Paul Rappaport award, the Vodaphone Americas Foundation Wireless Innovation Award, and the MIT Clean Energy Prize. He is currently serving as the editor-in-chief of the Journal of the Society for Information Display and is the general chair for the 2013 Device Research Conference.
    • Durga Misra
       - Senior Member
      Durga  Misra portrait placeholder
      NJ Institute of Technology
      Electrical and Comp. Eng. Department
      323 M L King Blvd.
      Newark, NJ 07102-1824
      Phone 1:
      +1 973 596 5739

      Lecture Topics:
      1. Challenges for Nanoelectronics: More Moore and More than Moore.
      2. High-k on High-Mobility Substrates: An interface Issue
  • Region 2 (Eastern USA) - EDS Distinguished Lecturers

    • Vijay Arora
      Vijay Arora portrait placeholder
      Wilkes University
      Division of Engineering, SLC237
      84 West South Street
      Wilkes-Barre, PA 18766
      Phone 1:
      (570) 408-4813

      Lecture Topics: Nanoelectronics, Quantum Engineering of Low-Dimensional Nanoensembles, High-Field Transport, Ballistic Transport, Carbon-Based Nanostructures, Graphene Electronics, Quantum Physics to Nanoengineering
    • Paul Berger
       - Fellow
      Paul Berger portrait
      The Ohio State University
      205 Dreese Laboratory, 2015 Neil Avenue
      Columbus, OH 43210
      United States of America
      Phone 1:
      (614) 247-6235

      (614) 292-7596
      Lecture Topics: In 2011, he was established as an IEEE Distinguished Lecturer for EDS. Please contact him directly if you are interested in a seminar: Possible seminar topics include:
      (1) Organic Photovoltaics;
      (2) Quantum Tunneling Electronics;
      (3) Passive Millimeter-Wave Imaging Sensors;
      (4) Plastic SmartCards for IoT

      Paul R. Berger (S’84 M’91 SM’97 F’11) is a Professor in Electrical & Computer Engineering at Ohio State University and Physics (by Courtesy). He is also a Distinguished Visiting Professor at Tampere University of Technology in Finland. He received the B.S.E. in engineering physics, and the M.S.E. and Ph.D. (1990) in electrical engineering, respectively, all from the University of Michigan, Ann Arbor. Currently, Dr. Berger is actively working on quantum tunneling devices, printable semiconductor devices & circuits for IoT, bioelectronics, novel devices, novel semiconductors and applied physics.
      Formerly, he worked at Bell Laboratories, Murray Hill, NJ (1990-’92) and taught at the University of Delaware in Electrical and Computer Engineering (1992-2000). In 1999, Prof. Berger took a sabbatical leave while working first at the Max-Planck Institute for Polymer Research, Mainz, Germany while supported by Prof. Dr. Gerhard Wegner and then moved on to Cambridge Display Technology, Ltd., Cambridge, United Kingdom working under Dr. Jeremy Burroughes. In 2008, Prof. Berger spent an extended sabbatical leave at IMEC (Interuniversity Microelectronics Center) in Leuven, Belgium while appointed as a Visiting Professor in the Department of Metallurgy and Materials Engineering, Katholieke Universiteit Leuven, Belgium. And more recently he took a sabbatical leave in 2015-2016 at Tampere University of Technology with the Prof. Don Lupo in the Printed and Organic Electronics Group.
      He has authored over 110 articles, 5 book sections and been issued 22 patents with 6 more pending from 60+ disclosures with a Google Scholar H-index of 33. Some notable recognitions for Dr. Berger were an NSF CAREER Award (1996), a DARPA ULTRA Sustained Excellence Award (1998), a Lumley Research Award (2006, 2011), a Faculty Diversity Excellence Award (2009) and Outstanding Engineering Educator for State of Ohio (2014). He has been on the Program and Advisory Committees of numerous conferences, including the IEDM, ISDRS, EDTM meetings. He currently is the Chair of the Columbus IEEE EDS/Photonics Chapter and Faculty Advisor to Ohio State’s IEEE Student Chapters. He is a Fellow and Distinguished Lecturer of IEEE EDS and a Senior member of Optical Society of America.
    • Nadim Haddad
      Nadim Haddad portrait
      2704 Berryland Drive
      Oakton, VA 22124
      Nadim F. Haddad received his B.A. in Physics and Mathematics in 1965 from Kansas Wesleyan University and his M.S. in Electrical Engineering in 1966 from Michigan State University. He joined IBM Components Division in East Fishkill, NY and became a manager of Yield Diagnostics, then transferred to the Federal Systems Division in Manassas, VA as a manager of Semiconductor Technology Development. He then rejoined the technical team as a Senior Technical Staff Member, and served as a principal investigator for the VLSI Independent Research and Development. Nadim was the lead engineer for the development of radiation hardened technology for the Very High Speed Integrated Circuit (VHSIC) Program, Radiation Hardened Microelectronics Program, among others; and was instrumental to the development of nine generations of radiation hardened technology and products at IBM, Loral, Lockheed Martin and BAE Systems. His approach capitalized on significant commercial investment in driving forward the development of radiation hardened technologies and products for space in support of military, civil and commercial applications. He retired in in 1997 from IBM and in 2012 from BAE Systems as a Technical Director and Engineering Fellow. He then served as a Term Professional Engineer with the Institute for Space and Defense Electronics (ISDE) at Vanderbilt University.

      Nadim was an active participants in several technology forums including the IEEE Nuclear and Space Radiation Effects Conference (NSREC), Hardened Electronics and Radiation Technology (HEART), Government Microcircuit Applications and Critical Technology Conference (GOMACTech), IEEE International SOI Conference, Radiation and its Effects on Components and Systems (RADECS), and Single Event Effects Symposium (SEE) as an author/presenter, paper reviewer, short course instructor, session chair and technical program chair. He authored or co-authored over 100 publications and is credited with 26 inventions.

      Nadim was recognized in 2012 as a Fellow/IEEE “for development of radiation hardened semiconductor device technology and products for space applications”. He is a member of NPSS and EDS, and is an EDS Distinguished Lecturer. Currently, he is serving as Chair, Nanotechnology Council of Northern Virginia and Washington, DC, and served as a Past Director in the Northern Virginia Section of IEEE.

      He was recognized in Marquis Who’s Who in America, Who’s Who in Science and Engineering and Who’s Who in the World.

      Lecture Titles:
      Space and Nuclear Radiation Effects on Semiconductor Devices
      Radiation Hardening Techniques for Semiconductor Devices
      Semiconductor Devices for Space Applications
      Semiconductor Technology Scaling Trends on Radiation Effects
    • Michael Shur
       - Fellow
      Michael  Shur portrait
      Rensselaer Polytechnic
      9433 Van Arsdale Dr
      Vienna, VA 22181-6117
      Phone 1:
      +1 518 421 8830

      Lecture Topics:

      1. Terahertz Plasmonic devices
      2. Silicon THz and sub-THz Electronics for imaging, sensing, testing, and communication
      3. Wide Band Gap Technology: State-of-the-Art and Problems to Solve
      4. Physics of III-N-based Field Effect Transistors
      5. Beyond Sunlight: Smart LED Lighting
      6. Physics of III-N Electronic and Optoelectronic Devices
      7. Counter Intuitive Physics of Ballistic Transport in the State-of-the-Art Electronic Devices
      8. State-of-the-Art Silicon VLSI: Industrial Face of Nanotechnology
  • Region 3 (Southeastern USA) - EDS Distinguished Lecturers

    • Victor Veliadis
      Victor Veliadis portrait
      North Carolina State University
      930 Main Campus Drive
      Raleigh, NC 27606
      Phone 1:
      443 255 9899

      Lecture topics
      1. SiC power device design, fabrication, testing, reliability, and select applications
      2. Accelerating Commercialization of SiC Power Electronics: large volume applications, foundry models, workforce training, and cost considerations

      Dr. Victor Veliadis is Deputy Executive Director and CTO of PowerAmerica, which is a U.S Department of Energy wide bandgap power electronics public-private Manufacturing Institute. Dr. Veliadis manages a budget in excess of $30 million per year that he strategically allocates to over 35 industrial, University, and National-Laboratory projects, to enable US leadership in WBG power electronics manufacturing, work force development, job creation, and energy savings.

      Dr. Veliadis has given over 60 invited presentations/keynotes/tutorials, and is an IEEE Fellow and an IEEE EDS Distinguished Lecturer. He has 25 issued US patents, 3 book chapters, and 115 peer-reviewed technical publications to his credit. Dr. Veliadis is also Professor in Electrical and Computer Engineering at North Carolina State University. He received the five-year diploma degree from the National Technical University of Athens Greece in 1990, and the Masters and Ph.D. degrees from Johns Hopkins University in 1992 and 1995, respectively, all in Electrical and Computer Engineering. Prior to being named Deputy Executive Director and CTO of Power America in 2016, Dr. Veliadis spent 21 years in the semiconductor industry where his technical work included design, fabrication, and testing of 1-12 kV SiC SITs, JFETs, MOSFETs, Thyristors, and JBS and PiN diodes. Dr. Veliadis has worked for a small (12 employees) company, for Lucent Technologies, and for Northrop Grumman Corporation. He has taught at Johns Hopkins University, St. Joseph University, and Ursinus College. Dr. Veliadis has received military training in the Army Infantry, and is a third degree black belt in Shotokan karate.
    • Jiann-Shiun (Peter) Yuan
       - Editor
      Jiann-Shiun (Peter) Yuan portrait
      University of Central Florida
      Department of Electrical Engineering and Computer Science, University of Central Florida
      Orlando, Florida 32816
      United States
      Phone 1:

      Peter J.S. Yuan received both the M.S. and Ph.D. degrees (1984 and 1988) from the University of Florida. He joined the faculty at the University of Central Florida in 1990 after one year of industrial experience at Texas Instruments, Inc., where he was involved with the 16-MB CMOS DRAM design. Currently, he is a professor and director of the Chip Design and Reliability Laboratory at the School of Electrical Engineering and Computer Science at UCF.

      Dr. Yuan has published more 130 papers in referred journals and conference proceedings in the area of semiconductor devices and circuits. He has authored the book Semiconductor Device Physics and Simulation, published by Plenum in 1998 and the book SiGe, GaAs, and InP Heterojunction Bipolar Transistors published by Wiley in 1999. Since 1990, he has conducted many research projects funded by NSF, Motorola, Harris, Lucent Technologies, National Semiconductor, and Theses Logic. He serves regularly as a reviewer for the IEEE Transactions on Electron Devices, IEEE Electron Device Letters, and Solid-State Electronics. He has received many awards. These include the Distinguished Researcher Award, UCF, 1993 and 1996, Outstanding Engineering Educator Award, IEEE Orlando Section and Florida Council, 1993, and TIP award, UCF, 1995. He is listed in Who's Who in American Education and Who's Who in Science and Engineering.
      Dr. Yuan is a senior member of IEEE and member of Eta Kappa Nu and Tau Beta Pi. He is currently the associate editor of the International Journal of Modeling and Simulation, an editor of the IEEE Transactions on Device and Materials Reliability and the past Chairman of the Electron Devices Chapter in the IEEE Orlando Section.

      Dr. Walls is a Senior Member of the IEEE Electron Devices Society.
  • Region 4 (Central USA) - EDS Distinguished Lecturers

    • Vikram L. Dalal
       - Fellow
      Vikram L. Dalal portrait
      Iowa state University
      Microelectronics Research Center 133 ASC I
      Ames, Iowa 50011
      Phone 1:
      1 515 294 1077

      1 515 294 9584
      Dr. Dalal is Whitney Chair Professor of Electrical and Computer Engineering at Iowa State University. He received his B.E. degree in Electrical Engineering from University of Bombay in India in 1964, and Ph.D. from Princeton University, also in EE, in 1969. He also holds a M.P.A. with focus on Economics from Princeton. Dr. Dalal has extensive research experience in both academia and industry, having worked as a research scientist at RCA Laboratories, and at several small companies. His academic experience includes working as a research scientist at University of Delaware’s Institute of Energy Conversion, and as Professor and Director of Microelectronics Research Center at Iowa State University. His expertise is in R&D on photovoltaic materials and devices. He has published over 180 papers and refereed proceedings articles, and also holds 12 U.S. patents. He is a Fellow of IEEE, American Physical Society and American Association for Advancement of Science.

      Lecture Titles:
      Photovoltaic energy conversion, solar energy systems, energy systems, energy economics, energy and environment
    • Patrick Fay
       - Compound Semiconductor Devices
      Patrick Fay portrait
      University of Notre Dame
      Department of Electrical Engineering
      261 Fitzpatrick Hall
      Notre Dame, IN 46556
      Phone 1:
      (574) 631-5693

      Email 1:

      Patrick Fay received a B.S. degree in Electrical Engineering from the University of Notre Dame in 1991, followed by the M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign in 1993 and 1996, respectively. He joined the faculty of the Department of Electrical Engineering at the University of Notre Dame in 1997, where he currently a professor as well as the director of the Notre Dame Nanofabrication Facility. His research interests include the design, fabrication, and characterization of III-V microwave and millimeter-wave electronic devices and circuits, power devices, and high-speed optoelectronic devices and optoelectronic integrated circuits. His research also includes the development and use of micromachining techniques for the fabrication of microwave and millimeter-wave components and packaging. Prof. Fay was awarded the Department of Electrical Engineering’s Outstanding Teacher award in 1998 and 2018, and Notre Dame's College of Engineering’s Outstanding Teacher award in 2015. He is a fellow of the IEEE, and Electron Device Society Distinguished Lecturer, and serves as an associate editor of the IEEE Transactions on Components, Packaging and Manufacturing Technology, IEEE Transactions on Electron Devices, and IEEE Transactions on Microwave Theory and Techniques.

      Prof. Fay’s lecture topics include:
      - III-N Nanowire FETs for Low-Power Applications
      - Vertical GaN Devices and Epitaxial Lift-Off Processing for High Performance Power Applications
      - Advanced Tunneling-Based Devices for mm-Wave Sensing and Imaging
    • Mina Rais-Zadeh
      Mina Rais-Zadeh  portrait
      Associate Professor
      University of Michigan
      1301 Beal Ave
      Ann Arbor, MI 48109

      Research Areas: Electron devices for wireless communication and sensing applications and the related device physics, Resonant Sensors: e.g. uncooled infrared detectors, Gallium nitride MEMS and microsystems

      Professional Memberships: IEEE EDS

      Biography: Mina Rais-Zadeh received the B.S. degree in electrical engineering from Sharif University of Technology and M.S. and Ph.D. degrees both in Electrical and Computer Engineering from Georgia Institute of Technology in 2005 and 2008, respectively. From August 2008 to 2009, she was a Postdoctoral Research Fellow at Georgia Institute of Technology. Since January 2009, she has been with the University of Michigan, Ann Arbor, where she is currently an Associate Professor in the Department of Electrical Engineering and Computer Science.

      Dr. Rais-Zadeh is the recipient of the NSF CAREER Award (2011), IEEE Electron Device Society Early Career Award (2011), NASA Early Career Faculty Award (2012), the Crosby Research Award from the University of Michigan (2013), National Academy of Engineering Frontiers of Engineering (2013), and ONR Young Investigator Award (2014). Together with her students, she received the best poster award at the Transducers conference (2013), the best paper award at the IEEE SiRF conference (2014), honorable mention at the IEEE IMS (2014), and was the finalist in student paper competitions at the SiRF (2007) and IMS (2011) conferences. She was the chairperson of the Display, Sensors and MEMS (DSM) sub-committee at the 2013 IEEE International Electron Devices Meeting (IEDM) and is a member of the 2014 IEDM Executive Committee and 2015 IEEE MEMS Executive Committee. She is a senior member of IEEE and has served as a member of the technical program committee of IEEE IEDM (2011-2013), IEEE Sensors Conference (2011-2014), the Hilton Head workshop (2012, 2014), the IEEE MEMS Conference (2014-2015), Transducers (2015), and IFCS (2015). She is an associate editor of the IEEE Electron Device Letters. Her research interests include electron devices for wireless communication and sensing applications and the related device physics, resonant micromechanical devices, RF MEMS, gallium nitride MEMS, and micro/nano fabrication process development.

  • Region 5 (Southwestern USA) - EDS Distinguished Lecturers

    • Charvaka Duvvury
       - Fellow
      Charvaka Duvvury portrait placeholder
      ESD Consulting LLC
      6821 Oak Park Lane
      Plano, TX 75023
      Phone 1:

      Lecture Topics:   ESD and Latchup Reliability
    • Muhammad Mustafa Hussain
       - MOS Devices and Technology
      Muhammad Mustafa Hussain portrait
      Senior Member
      King Abdullah University of Science and Technology
      3824 Yarborough Ave
      Austin, TX 78744
      Phone 1:
      +1 (512) 351-3527

      Dr. Muhammad Mustafa Hussain (PhD, ECE, UT Austin, Dec 2005) is a Professor of Electrical Engineering, KAUST. He was Program Manager in SEMATECH (2008-2009) and Process Integration Lead for 22 nm node FinFET CMOS in Texas Instruments (2006-2008). His research is focused on futuristic electronics which has received support from DARPA, Boeing, Lockheed Martin, GSK-Novartis and SABIC. He has authored 300+ research papers and patents. His students are serving as faculty in KFUPM, KAU, Jeddah University and as researchers in MIT, Caltech, UC Berkeley, Harvard, UCLA, TSMC, and DOW Chemicals. He is a Fellow of American Physical Society and Institute of Physics, a distinguished lecturer of IEEE Electron Devices Society, and an Editor of IEEE T-ED. Scientific American has listed his research as one of the Top 10 World Changing Ideas of 2014. Applied Physics Letters selected his paper as one of the Top Feature Articles of 2015. He and his students have received 41 research awards including IEEE Outstanding Individual Achievement Award 2016, Outstanding Young Texas Exes Award 2015 DOW Chemical Sustainability Challenge Award 2012, etc. His research has been highlighted extensively in international media like in Washington Post, Wall Street Journal (WSJ), IEEE Spectrum, etc.

      Lecture Titles:
      1. Physically Compliant CMOS Electronics Enabled Interactive Electronic System
      2. Manufacturable Heterogeneous Integration of Compliant CMOS Electronics for Interactive Electronic System
    • Renuka P. Jindal
       - Fellow
      Renuka P. Jindal portrait
      University of Louisiana at Lafayette
      PO Box 60714
      Lafayette, LA 70596
      Phone 1:
      +1 337 482 6570

      +1 337 482 6687

      Renuka P. Jindal (S’77–M’81–SM’85–F’91) received the Ph.D. degree in electrical engineering from the University of Minnesota, Minneapolis, MN, USA, in 1981, with minors in physics and materials science.

      Upon graduation, he joined Bell Laboratories, Murray Hill, NJ, USA. His over 22 years of experience at Bell Laboratories bridged both technical and administrative roles. On the technical side, he worked in all three areas of devices, circuits, and systems. Highlights include fundamental studies of noise behavior of MOS devices with channel lengths in the few hundred nanometers regime. His contributions led to almost an order of magnitude reduction in the device noise. Over the years, this has made MOS the technology of choice for broad-band fiber-optics and narrowband wireless base station and terminal applications, including cell phones and pagers. He also designed and demonstrated high-performance single-chip gigahertz-band radio frequency (RF) integrated circuits (ICs) for AT&T’s Metrobus Lightwave Project. He researched the physics of carrier multiplication and invented techniques for ultra-low noise signal amplification and detection in terms of novel devices and circuits based upon a new principle of random multiplication and optoelectronic integration. On the administrative side, he developed and managed significant extramural funding from federal agencies and independent Lucent Technologies business units. He was solely responsible for developing and deploying a corporate-wide manufacturing test strategy in relation to contract manufacturing for Lucent Technologies. He also established and taught RF IC design courses at Rutgers University, Piscataway, NJ, USA. In 2002, he accepted the position as the William and Mary Hansen Hall Board of Regents Eminent Scholar Endowed Chair at the University of Louisiana, Lafayette, LA, USA. There, he continues to teach and undertake fundamental research in the areas of random processes, wireless and lightwave devices, circuits, and systems. He is also very active in professional activities, in conjunction with the IEEE, and is an Electron Devices Society Distinguished Lecturer. He has also participated in ABET activities as an evaluator for electrical engineering programs at institutions in the United States.

      Dr. Jindal was a recipient of the Distinguished Technical Staff Award from Bell Labs in 1989. In December 2000, he received the IEEE Third Millennium Medal. From 1987 to 1989, he served as an editor of the Solid-State Device Phenomena Section of the IEEE Transactions on Electron Devices. From 1990 to 2000, he was the Editor-in-Chief of the IEEE Transactions on Electron Devices. From 2000 to 2008, he served as the Vice President of Publications for the IEEE electron Devices Society (EDS). In December 2007, he was voted in as the President-Elect of EDS. From 2010 to 2011, he served as the President of the IEEE Electron Devices Society. Now, he continues to actively be involved with the society as the Senior Past President.

      Lecture Topics:

      1. Discreteness of matter - the ultimate scaling challenge
      2. Milli-bits to Tera-bits per second and Beyond - Over 60 years of Innovation
      3. Nano-FET fluctuation physics
      4. Material, Device, Circuit and System Considerations for almost noise-free signal detection

    • Lawrence Kazmerski
      Lawrence Kazmerski portrait placeholder
      National Renewable Energy Laboratory
      University of Colorado 1617
      Cole Boulevard
      Phone 1:
      (303) 524-0315

      Lawrence L. Kazmerski is Emeritus Research Staff Member of the National Renewable Energy Laboratory, having last served as Executive Director, Science and Technology Partnerships at NREL 2009-2013. He is currently Research Professor at the University of Colorado Boulder, with the Renewable and Sustainable Energy Institute (RASEI). Previously, Kazmerski served as the founding Director of the National Center for Photovoltaics for the period 1999-2008. He received his B.S.E.E. (1967), M.S.E.E. (1968), and his Ph.D. degree (1970) in electrical engineering—all from the University of Notre Dame. He served in a postdoctoral position with the Atomic Energy Commission at the Notre Dame Radiation Research Laboratory, January through August 1971. He was on the electrical engineering faculty of the University of Maine before coming to SERI (NREL) in 1977. His research at Maine included NSF- and ERDA-funded work in thin-film photovoltaics and the report of the first thin-film copper-indium-diselenide (CIS) solar cell. He was SERI’s (NREL’s) first staff member in photovoltaics, hired specifically to establish efforts in the characterization of photovoltaic materials and devices; he led NREL efforts in measurements and characterization for more than 20 years.  Kazmerski has more than 320 publications and some 200 invited talks. His research interests included the DOE Office of Science Energy Frontiers Research Center (EFRC) at NREL dealing with “materials by design” (www.centerforinversedesign.org), for which he served as Project Integrator (2009-2012), and solar projects ranging from the rebuilding of the electricity infrastructure in Iraq through mitigating dust problems for PV collectors (with emphasis on the MENA countries).  He served as the Co-Director of the Joint US-India Joint Clean Energy Research and Development Center (“Solar Energy Research Institute for India and the U.S.” or SERIIUS – www.SERIIUS.org ).  Currently, he is involved with PV reliability R&D supported by the government of Brazil—especially dealing with soiling issues and mitigation with various PV technologies – www.PVReliability.org . At CU, he serves as the Program Integrator for the CU “Sunshot Initiative” program on perovskite materials and solar cells. He has been recognized with several national and international awards, including the World PV Prize, the IEEE William R. Cherry Award, the AVS Peter Mark Memorial Award, and the ASES Charles Greeley Abbot Award. In November 2013, Kazmerski was presented the ISES Christopher A. Weeks Award for contributions in accelerating PV research, development, and deployment around the world. He is a Fellow of the IEEE, a Fellow of the APS, a Fellow of the AVS, and a Fellow of the American Solar Energy Society (ASES). Kazmerski holds joint research (renewable energy) faculty appointments at the University of Southampton, the Chinese Academy of Science, and the Pontifícia Universidade Católica de Minas Gerais (Brasil)—and most recently, as a Distinguished Visiting Professor with IIT-Bombay (working with their PV efforts). In 2017, Kazmerski became a Distinguished Lecturer for the IEEE EDS. Kazmerski is a member (elected 2005) of the National Academy of Engineering.



  • Region 6 (Western USA) - EDS Distinguished Lecturers

    • Deji Akinwande
       - Emerging Technologies and Devices; Thin Film Transistors
      Deji Akinwande portrait
      University of Texas at Austin
      10100 Burnet Road, Bldg. 160
      Austin, TX 78758
      Phone 1:
      +1 703 623 6423

      Dr. Deji Akinwande is a Fellow of the American Physical Society (APS). He received the PhD degree in Electrical Engineering from Stanford University in 2009, where he conducted research on the synthesis, device physics, and circuit applications of carbon nanotubes and graphene. His Master’s research in Applied Physics at Case Western Reserve University pioneered the design and development of near-field microwave probe tips for nondestructive imaging and studies of materials.

      He is the David & Doris Lybarger Endowed Faculty Professor at the University of Texas at Austin. His research focuses on 2D materials, pioneering device innovations from lab towards applications. Prof. Akinwande has been honored with the 2018 Fulbright Specialist Award, 2017 Bessel-Humboldt Research Award, the U.S Presidential PECASE award, the inaugural Gordon Moore Inventor Fellow award, the inaugural IEEE Nano Geim and Novoselov Graphene Prize, the IEEE “Early Career Award” in Nanotechnology, the NSF CAREER award, several DoD Young Investigator awards, the 3M Nontenured Faculty Award, and was a past recipient of fellowships from the Kilby/TI, Ford Foundation, Alfred P. Sloan Foundation, and Stanford DARE Initiative. His recent results on silicene have been featured by nature news, Time magazine and was selected among the top 2015 science stories by Discover magazine. His work on flexible 2D electronics was highlighted among the "best of 2012" by the nanotechweb news portal and has been featured on MIT's technology review and other technical media outlets. He is a distinguished lecturer of the IEEE Electron Device Society and an Editor for the IEEE Electron Device Letters and Nature NPJ 2D Materials and Applications. He is the Conference Chair of the 2018/2019 Device Research Conference (DRC), and the Committee Chair of Nano-devices for 2018 IEEE IEDM Conference. He co-authored a textbook on carbon nanotubes and graphene device physics by Cambridge University Press, 2011, and was recently a finalist for the Regents' Outstanding Teaching Award, the highest teaching award from the University of Texas System.


      1. Flexible 2D Nanoelectronics: Device Physics, Mechanics and Circuits
      2. Graphene Devices and Si-CMOS Integration
      3. 2D Materials and Devices and Device Physics
      4. Non-volatile memory devices and applications
      5. RF Devices and Circuits
    • Kaustav Banerjee
      Kaustav  Banerjee portrait
      University of California
      Dept. of Elec. & Comp. Eng.
      Room 4151, Harold Frank Hill
      Santa Barbara , CA 93106-9560
      Phone 1:
      +1 805 893 3337

      +1 805 893 3262
      Kaustav Banerjee is a Professor of Electrical and Computer Engineering at the University of California, Santa Barbara, and is one of the world’s leading innovators in the field of nanoelectronics. His current research focuses on the physics, technology, and applications of van der Waals materials and heterostructures for next-generation electronics, photonics, and bioelectronics. Initially trained as a physicist, he graduated from UC Berkeley with a PhD in electrical engineering in 1999. Professor Banerjee is a Fellow of IEEE, American Physical Society (APS), Japan Society for the Promotion of Science (JSPS), and the American Association for the Advancement of Science (AAAS). His technical contributions are chronicled in over 300 research papers (including over 40 IEDM papers) with >19,000 citations and h-index of 68, many of which have been highlighted by leading STEM organizations including the NAE, NEDO, and the NSF, as well as by numerous technical and popular press worldwide including IEEE Spectrum, Science World Report, EE Times, and The Economist. His most recent invention of the kinetic inductor using intercalated-graphene has been called “a great leap in nanomaterials” by Forbes.

      A Distinguished Lecturer of the IEEE Electron Devices Society since 2008, Professor Banerjee has delivered over 300 plenary/keynote/invited talks at leading venues around the world. Among the dozen-odd PhD students he has mentored, three are recipients of the IEEE EDS PhD Student Fellowship Award. In 2011, he was among five engineers worldwide to receive the prestigious Bessel Prize from the Humboldt Foundation for his contributions to nanoelectronics and his proposed research on tunnel-field-effect transistors. Professor Banerjee’s contributions to energy-efficient electronics, including seminal work on interconnects, 3D ICs, and thermal-aware VLSI design, have been recognized by the IEEE with a Technical Field Award - 2015 Kiyo Tomiyasu Award - one of the institute's highest honors. More information about him and his research is available at: https://nrl.ece.ucsb.edu/
    • Hector De Los Santos
       - Fellow
      Hector De Los Santos portrait placeholder
      NanoMEMS Research, LLC
      4000 Barranca Pkwy, Ste 250
      Irvine, CA 92606-1731
      Phone 1:


      Lecture Topics:

      1) NanoMEMS: Enabling the Internet of Things

      2) Theory of Nano-Electron-Fluidic Logic (NFL): A New Digital "Electronics"" Concept"

    • Subramanian Iyer
       - Fellow
      Subramanian Iyer portrait placeholder
      Distinguished Chancellors Professor and IBM Fellow
      Electrical Engineering Department
      CA 90024
      310 825 6913

      914 329 3341

      Lecture Topics: Orthogonal Scaling, embededed Memory, system scaling, 3D integration, semiconductors
    • Meyya Meyyappan
       - Fellow
      Meyya  Meyyappan  portrait
      NASA Ames Research Center
      Center for Nanotechnology
      Mailstop 229-3
      Moffett Field, CA 94035
      Phone 1:
      +1 650 604 2616

      +1 650 604 5244
      Lecture Topics: 1. An overview of recent developments in Nanotechnology

      2. Nanotechnology in nanoelectroncis, optoelectronics and sensor development

      3. Carbon based electronics

      4. Nanotechnology: development of practical systems and nano-micro-macro integration.
    • Samar K. Saha
       - Senior Member
      Samar K. Saha portrait
      Prospicient Devices
      Milpitas, CA 95035
      Phone 1:
      +1 408 966 5805

      Phone 2

      Lecture Topics: (1) Compact Variability Modeling; (2) Scaling Flash Memory Cell to Nanometer Regime; (3) High-performance and Ultra-low Power CMOS Device and Technology

    • Ravi M. Todi
       - MOS Devices and Technology
      Ravi M.  Todi portrait
      Director and Senior Technologist Foundry Technology Development
      Foundry Technology Development
      951 SanDisk Drive
      Milpitas, CA 95035
      Phone 1:
      O: 408-801-8118

      Phone 2
      C: 858-947-8513

      Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
    • Albert Z.H. Wang
       - Fellow - IEEE
      Albert Z.H. Wang portrait
      University of California
      Dept. of Electrical and Computer Engineering
      417 Winston Chung Hall
      Riverside, CA 92521
      Phone 1:
      +1 951 827 2555

      +1 951 827 2425
      Albert Wang received the BSEE degree from Tsinghua University, China, and the PhD EE degree from State University of New York at Buffalo, USA, in 1985 and 1996, respectively. From 1995 to 1998, he was with National Semiconductor Corporation, USA. From 1998 to 2007, He was an Assistant and Associate Professor in the Department of Electrical and Computer Engineering at the Illinois Institute of Technology, Chicago, USA. Since 2007, He has been a Professor of Electrical and Computer Engineering at the University of California, Riverside, USA, where he is Director for the Laboratory for Integrated Circuits and Systems and Director for the University of California system-wide Center for Ubiquitous Communications by Light. His research covers Analog/Mixed-Signal/RF ICs, Integrated Design-for-Reliability, 3D Heterogeneous Integration, IC CAD and Modelling, Biomedical Electronics, Emerging Nano Devices and Circuits, and LED-based Visible Light Communications. Wang received the CAREER Award from the National Science Foundation, USA. He published one book and more than 250 papers, and holds 13 US patents. Wang was editor and guest editor for IEEE Electron Device Letters, IEEE Transactions on Circuits and Systems I, IEEE Transactions on Circuits and Systems II, IEEE Journal of Solid-State Circuits and IEEE Transactions on Electron Devices. He has been an IEEE Distinguished Lecturer for IEEE Electron Devices Society, IEEE Solid-State Circuits Society and IEEE Circuits and Systems Society. He is Sr. Past President (2018-2019), and was Jr. Past President (2016-2017) and President (2014-2015) of IEEE Electron Devices Society. He was Chair of the IEEE CAS Analog Signal Processing Technical Committee (ASPTC) and committee member for the SIA International Technology Roadmap for Semiconductor (ITRS). He is IEEE 5G Initiative member. He is a member of IEEE Fellow Committee. He was General Chair (2016) and TPC Chair (2015) for IEEE RFIC Symposium. He served as committee member for many IEEE conferences, including IEDM, EDTM, BCTM, ASICON, IEDST, ICSICT, CICC, RFIC, APC-CAS, ASP-DAC, ISCAS, IPFA, ICEMAC, NewCAS, ISTC, IRPS, AP-RASC, MAPE, EDSSC, MIEL, etc. Wang is an IEEE Fellow and AAAS Fellow.
    • Cary Y. Yang
       - Life Fellow
      Cary Y.  Yang portrait
      Santa Clara University
      Center for Nanostructures
      500 El Camino Real
      Santa Clara, CA 95053
      Phone 1:
      +1 408 554 6814

      +1 408 554 5474
      Lecture Topics: Nanocarbon Interconnects; Metal-Nanocarbon Contacts

      Cary Y. Yang received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Pennsylvania. After working at M.I.T., NASA Ames Research Center, and Stanford University on electronic properties of nanostructure surfaces and interfaces, he founded Surface Analytic Research, a Silicon Valley company focusing on sponsored research projects covering various applications of surfaces and nanostructures. He joined Santa Clara University in 1983 and is currently Professor of Electrical Engineering and Director of TENT Laboratory, a SCU facility located inside NASA Ames. He was the Founding Director of Microelectronics Laboratory and Center for Nanostructures, and served as Chair of Electrical Engineering and Associate Dean of Engineering at Santa Clara. His research spans from silicon-based nanoelectronics to nanostructure interfaces in electronic, biological, and energy-storage systems. An IEEE Life Fellow, he served as Editor of the IEEE Transactions on Electron Devices, President of the IEEE Electron Devices Society, and elected member of the IEEE Board of Directors. He was appointed Vice Chair of the IEEE Awards Board in 2013 and 2014. He received the 2004 IEEE Educational Activities Board Meritorious Achievement Award in Continuing Education "for extensive and innovative contributions to the continuing education of working professionals in the field of micro/nanoelectronics," and the IEEE Electron Devices Society Distinguished Service Award in 2005. From 2008 to 2013, he held the Bao Yugang Chair Professorship at Zhejiang University in China.

    • Bin Yu
       - Fellow
      Bin Yu portrait placeholder
      State University of New York at Albany
      College of Nanoscale Science and Engineering
      255 Fuller Road
      Albany, NY 12203
      Phone 1:
      +1 518 956 7492

      Lecture Topics: Role of Nanotechnology in Future ICs 2D Carbon/Semiconductor: Materials, Devices, and Interconnects  Emerging Nanostructure-Based Photovoltaics Phase-Change Nanomemory
    • Paul K.L. Yu
       - Fellow
      Paul K.L.  Yu portrait
      University of California at San Diego
      ECE Department, MS 0407
      9500 Gilman Dr., Eng. Bldg. Unit 1, Room 3604
      La Jolla, CA 92093-0407
      Phone 1:
      +1 858 534 6180

      +1 858 534 0556
      Lecture Topics: Recent Advances in Photonic Devices for RF/Wireless, Semiconductor Wafer Bonding Technology for Device Integration
    • Bin Zhao
       - Fellow
      Bin Zhao portrait
      ON Semiconductor
      32 Discovery, Suite 100
      Irvine, CA 92618
      Phone 1:
      +1 949 266 6800

      +1 614 737 6800

      Lecture Topics:

      > Analog/Mixed-Signal/RF IC and Enabling Technologies
      > High Performance VLSI Interconnect

  • Region 7 (Canada) - EDS Distinguished Lecturers

    • Ramachandra Achar
       - IEEE Fellow
      Ramachandra Achar portrait placeholder
      Professor, Department of Electronics
      Carleton University
      1125 Colonel By Drive
      Ottawa K1S 5B6
      Phone 1:

      Lecture topics:
      1)Signal Integrity and High-Speed Interconnects
      2)Scaling: Performance Challenges of Interconnects
      3)Power Integrity: Powering the nanoscale devices
      4)Variational Modeling and Analysis
    • Jamal Deen
       - Fellow
      Jamal Deen portrait
      McMaster University
      Dept. of Elec. and Comp. Eng., ITB 104
      1280 Main Street West
      Hamilton, Ontario L8S 4K1
      Phone 1:
      +1 905 525 9140 Ext. 27137

      +1 905 523 4407

      Lecture Topics: 

      1. Bioimagers for Health and Environmental Applications
      2. Biosensors - Life at the intersection of Engineering and Sciences
      3. Photodetectors - From Quantum Dot to Silicon Imagers
      4. Information and Communications Technologies for Ubiquitous Healthcare
      5. Smart Home Technologies Towards Better Healthcare
      6. Flexible Electronics - Opportunities and Challenges
      7. Nanobonding – A Key Technology for Emerging Health & Environmental Application

    • Adam Skorek
       - Fellow
      Adam Skorek portrait
      University of Quebec at Trois-Rivières
      3351, boul. des Forges
      Trois-Rivieres, Quebec G9A 5H7
      Phone 1:
      +1 (819) 376-5011 ext. 3929

      +1 (819) 376-5219
      Lecture Topics:  

      Electro-Thermal Analysis and Design

      High Performance Computing in Nanoelectronics

      Big Data and Electro-Thermal Design

      Internet of Things Electro-Thermal Control

  • Region 8 (Europe, Middle East and Africa) - EDS Distinguished Lecturers

    • Mikael Östling
       - Fellow
      Mikael  Östling portrait
      KTH, Royal Institute of Technology
      Dept of Microelectronics and InfoTech
      Electrum 229
      Kista SE-164 40
      Phone 1:
      +46 8 790 4301

      +46 8 752 7850

      Mikael Östling (M’ 85- F’04) received his MSc and the PhD degrees from Uppsala University, Sweden. He holds a position as professor in solid state electronics at KTH, Royal Institute of Technology in Stockholm, Sweden. He is currently department head of Integrated Devices and Circuits and was the dean of the School of Information and Communication Technology, KTH, between 2004–12. Östling was a senior visiting Fulbright Scholar at Stanford University, and a visiting professor with the University of Florida, Gainesville. In 2005 he co-founded the company TranSiC, acquired in full by Fairchild Semiconductor 2011. He was awarded the first ERC grant for advanced investigators. His research interests are nanoscaled Si and Ge device technologies and emerging 2D materials, as well as device technology for wide bandgap semiconductors for high power / high temperature applications. He has supervised 35 PhD theses work and co -authored about 500 scientific papers published in international journals and conferences. Mikael Östling was an editor of the IEEE Electron Device Letters 2005-2014 and appointed vice president of EDS since 2014. Mikael is a Fellow of the IEEE.

      Lecture Topics: SiC Device Technology for energy efficiency and for high temperature operation Silicon Nanoscaled Device Technology

    • Joachim N. Burghartz
      Joachim N. Burghartz portrait
      Institute for Microelectronics Stuttgart (IMS CHIPS)
      Director and Chairman of the Board
      Phone 1:
      +49 0 711 21855 200

      +49 0 711 21855 222
      Joachim N. Burghartz is an IEEE Fellow, an IEEE Distinguished Lecturer, recipient of the 2014 EDS J.J. Ebers Award, and has been an ExCom member of the IEEE Electron Devices Society. He received his MS degree from RWTH Aachen in 1982 and his PhD degree in 1987 from the University of Stuttgart, both in Germany. From 1987 thru 1998 he was with the IBM T. J. Watson Research Center in Yorktown Heights, New York, where he was engaged in early development of SiGe HBT technology and later in research on integrated passive components, particularly inductors, for application to monolithic RF circuits. From 1998 until 2005 he was with TU Delft in the Netherlands as a full professor and from 2001 as the Scientific Director of the Delft research institute DIMES. In fall 2005 he moved to Stuttgart, Germany, to head the Institute for Microelectronics Stuttgart (IMS CHIPS). In addition he is affiliated with the University of Stuttgart as a full professor. More recently, he also became CEO of the IMS Mikro-Nano Produkte GmbH. Dr. Burghartz has published about 350 reviewed articles and holds more than 30 patents.

      Distinguished Lecture Titles
      -Hybrid Systems in Foil
      -Ultra-thin chip technology
      -GaN technologies for power and RF
    • Cor L. Claeys
       - Fellow
      Cor L. Claeys portrait
      Molenveldplein 5
      Leuven B-3010
      Phone 1:
      +32 474274679

      Lecture Topics: * Low Frequency Noise in state of the art and emerging semiconductor technologies * Radiation Hardness of State-of-the-art Si and Ge-Based CMOS Technologies * Contact Technology Schemes for Advanced Ge and III-V CMOS Technologies * Trends and Challenges in Micro- and Nanoelectronics for the Next Decade
    • Sorin Cristoloveanu
       - Fellow
      Sorin  Cristoloveanu portrait
      3 Parvis, Louis Neel, B257
      Grenoble Cedex 1 F-38016
      Phone 1:
      +33 04 56 5294 99

      Lecture Topics: Characterization methods for thin film SOI materials and transistors. Floating-body capacitorless DRAM memory devices on SOI. Sharp switching transistors: tunneling vs band-modulation FETs. SOI Materials and Devices -- Novel Concepts & Dimensional Effects.
    • Simon Deleonibus
       - Fellow
      Simon  Deleonibus portrait
      Chief Scientist/Directeur Scientifique
      Silicon Technologies
      17 rue des Martyrs
      Grenoble Cedex 38054
      Phone 1:
      +33 438 785973

      33 438 785183
      Simon Deleonibus, retired from CEA-LETI on Jan 1st 2016 as Chief Scientist after 30 years of Research on Micro Nanoelectronics Devices Architectures. Before joining CEA-LETI, he was with Thomson Semiconductors(1981-1986), where he developed and transferred to production advanced microelectronics devices and products. He gained his PhD in Applied Physics from Paris University(1982). He is Visiting Professor at Tokyo Institute of Technology(Tokyo, Japan) since 2014 , National Chiao Tung University(Hsinchu, Taiwan) since 2015 and at Chinese Academy of Science(Beijing, PRC) since 2016 .
      He is distinguished CEA Research Director(2002), IEEE Distinguished Lecturer(2004), Fellow of the IEEE (2006), Fellow of the Electrochemical Society (2015).
      He was awarded the titles of Chevalier de l’Ordre National du Mérite(2004) and Chevalier de l’Ordre des Palmes Académiques(2011), the 2005 Grand Prix de l’Académie des Technologies. He is member of the ITRS since1998, the European Research Council Panel(2007), the Nanosciences Foundation Board of Trustees( 2007).
      He was Associate Editor of IEEE Trans. on Elect. Dev.(2008-2014) and Member of the IEEE Electron Devices Society Board of Governors(01/2009-12/2014) and reelected(2016-2018) ; Chair of IEEE EDS Region 8 SRC (2015-2016) ; Secretary of IEEE Electron Devices Society (2016-2017).

    • Elena Gnani
       - Emerging Technologies
      Elena  Gnani portrait
      University of Bologna
      Bologna 40136
      Phone 1:
      39 051 2093773

      Elena Gnani received the M.S. degree in Electrical Engineering "summa cum laude" and the Ph.D degree in Electrical Engineering and Computer Science in 2003 with a dissertation entitled "Physical models for MOS nanostructures", both from the University of Bologna. In 2014 she became Associate Professor at the University of Bologna where she is involved in research activities concerning the development of physical transport models in semiconductor devices and numerical-analysis techniques, with special emphasis on the study of quantum-confined devices, such as FinFETs, silicon nanowires (NW), steep-slope devices representing possible candidates for future generations of the nanoelectronic technology, quasi ballistic transport in nanoMOSFETs, as well as carrier injection in non-volatile memory cells. She has been involved in several National and European Projects. Her research activities have been carried out in cooperation with worldwide semiconductor research centers and semiconductor industries.
      E. Gnani is author or co-author of more than 180 papers published in referred international journals and in proceedings of major international conferences, and of several invited contributions. She has been a member of the IEEE Electron Devices Society (EDS) from 2001, and is presently an IEEE Senior Member and EDS Distinguished Lecturer for Region8. She is also a member of the EDS Technology Computer Aided Design Committee.
    • Wladyslaw Grabinski
      Wladyslaw Grabinski portrait
      MOS-AK Association
      Station 11
      Lausanne CH-1015
      Phone 1:
      +41 79 883 6076

      Lecture Topics:
      Electrical Characterization (DC, CV, RF)
      TCAD Process/Device Simulations
      SPICE/Compact Modeling
      Verilog-A Standardization
    • Tibor Grasser
       - Senior Member
      Prof. Tibor Grasser is an IEEE Fellow and currently head of the Institute for Microelectronics at TU Wien. He has edited various books, e.g. on the bias temperature instability and hot carrier degradation (both Springer), is a distinguished lecturer of the IEEE EDS, has been involved in outstanding conferences such as IEDM, IRPS, SISPAD, ESSDERC, and IIRW, is a recipient of the Best and Outstanding Paper Awards at IRPS (2008, 2010, 2012, and 2014), IPFA (2013 and 2014), ESREF (2008) and the IEEE EDS Paul Rappaport Award (2011).
    • Benjamin Iniguez
       - Device and Process Modelling
      Benjamin Iniguez portrait
      Senior Member
      Universitat Rovira i Virgili (URV)
      Avinguda dels Paisos Catalans 26
      Tarragona 43007
      Phone 1:
      34 977558521

      34 977559605
      Benjamin Iñiguez obtained the Ph D in Physics in 1992 and 1996, respectively, from the Universitat de les Illes Balears (UIB). From February 1997 to September 1998 he was working as a Postdoctoral Researcher at the Rensselaer Polytecnhnic Institute in Troy (NY, USA). From September 1998 to January 2001 he was working as a Postdoctoral Scientist in the Université catholique de Louvain (Louvain-la-Neuve, Belgium), supported by two Marie Curie Fellowships from the European Commission. In February 2001 he joined the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA)of the Universitat Rovira i Virgili (URV), in Tarragona, Catalonia, Spain) as Titular Professor. In February 2010 he became Full Professor at URV. He obtained the Distinction from the Generalitat for the Promotion of University Research in 2004 and the ICREA Academia Award (the highest award for university professors in Catalonia, from ICREA Institute) in 2009 and 2014, for a period of 5 years each. He led one EU-funded project (“COMON”, 2008-12) devoted to the compact modeling of nanoscale semiconductor devices and he is currently leading one new EU-funded project (DOMINO, 2014-18) targeting the compact modeling of organic and oxide TFTs.
      His main research interests are the characterization, parameter extraction and compact modelling of emerging semiconductor devices, in particularorganic and oxide Thin-Film Transistors, nanoscale Multi-Gate MOSFETs and GaN HEMTs. He has published more than 150 research papers in international journals and more than 130 abstracts in proceedings of conferences.
    • Adrian M. Ionescu
       - Solid State Sensors and Actuators
      Adrian M.  Ionescu portrait
      Ecole Polytechnique Fédérale de Lausanne
      ELB335, Station 11
      Lausanne CH-1015
      Phone 1:
      +41 21 693 3978

      + 41 21 693 3640
      Adrian M. Ionescu is an Associate Professor at the Swiss Federal Institute of Technology Lausanne (Ecole Polytechnique Fédérale de Lausanne – EPFL), Switzerland. He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He held staff and/or visiting positions at LETI-Commissariat à l’Énergie Atomique, Grenoble, CNRS, Grenoble, and Stanford University, Stanford, CA, in 1998 and 1999. He is currently the Director of the Nanoelectronic Devices Laboratory and Director of the Doctoral School of Microsystems and Microelectronics of EPFL.
      Prof. Ionescu has published more than 200 articles in international journals and conference proceedings. He was the recipient of three Best Paper Awards at international conferences and the Annual Award of the Technical Section of the Romanian Academy of Sciences in 1994. He served on the International Electron Devices Meeting (IEDM) and European Solid-State Device Research Conference (ESSDERC) technical committees and was the Technical Program Committee Chair of the ESSDERC in 2006.
      He is a member of the Scientific Committee of the Cluster for Application and Technology Research in Europe on Nanoelectronics (CATRENE) and was appointed as the national representative of Switzerland to the European Nanoelectronics Initiative Advisory Council (ENIAC).
    • Lluis F. Marsal
       - Senior Member
      Lluis F. Marsal portrait
      Dept. of Electronic, Elec. & Automatic Cont. Eng. - University Rovira i Virgili
      Avda. Paisos Catalans 26 - Campus Sescelades
      Tarragona, Tarragona 43007
      Phone 1:
      +34 977559625

      +34 977559605
      Prof. Lluis F. Marsal is Distinguished Professor and full professor at the University Rovira i Virgili, Spain. Ph.D. from the University Politecnica de Catalunya, Spain, 1997. Postdoctoral researcher at the ECE, University of Waterloo, Canada (1998-1999). In 2014, he received the UniSA Distinguished Researcher Award, and the 2014 ICREA Academia Award from the Generalitat of Catalunya. Since 2019, he is the Chair of the Subcommittee for Regions/Chapters (SRC) Regions 8, IEEE- EDS. He was the Chair of Spain Chapter of the IEEE-EDS (2013-2018). He is a senior member of the IEEE and a member of the Distinguished Lecturer program of the EDS. He has co-authored more than 200 publications in international refereed journals, 2 books, 5 book chapters and 3 patents. His current research interests focus on organic solar cells and hybrid nanostructured materials for optoelectronic devices and low-cost technologies based on micro- and nanoporous materials for biosensing.

      Lecture Topics:
      Current progress and perspectives in polymer solar cells
      Nanostructured organic solar cells and polymers for flexible optoelectronic applications
      Photonic and optoelectronic devices based on porous materials
      Micro- and nanoporous materials for biosensing
    • Enrique Miranda
       - Senior Member
      Enrique Miranda portrait placeholder
      Universitat Autonoma de Barcelona
      Escola d'Enginyeria - Campus UAB
      Cerdanyola del Valles, Barcelona 08193
      Phone 1:
      34 93 581 3479

      Lecture Topics:  Spatial statistics for micro/nanoelectronics and materials science Failure mechanisms in capacitors and transistors Oxide breakdown and resistivive switching for ReRAM
    • Arokia Nathan
       - Fellow
      Arokia  Nathan portrait
      Cambridge Touch Technologies
      154 Science Park Milton Road
      Cambridge CB4 0GN
      United Kingdom of Great Britain and Northern Ireland
      Phone 1:
      +44 7886831216

      Arokia Nathan holds the Professorial Chair of Photonic Systems and Displays in the Department of Engineering, Cambridge University. He received his PhD in Electrical Engineering from the University of Alberta. Following post-doctoral years at LSI Logic Corp., USA and ETH Zurich, Switzerland, he joined the University of Waterloo where he held the DALSA/NSERC Industrial Research Chair in sensor technology and subsequently the Canada Research Chair in nano-scale flexible circuits. He was a recipient of the 2001 NSERC E.W.R. Steacie Fellowship. In 2006, he moved to the UK to take up the Sumitomo Chair of Nanotechnology at the London Centre for Nanotechnology, University College London, where he received the Royal Society Wolfson Research Merit Award. He has held Visiting Professor appointments at the Physical Electronics Laboratory, ETH Zürich and the Engineering Department, Cambridge University, UK. He has published over 500 papers in the field of sensor technology and CAD, and thin film transistor electronics, and is a co-author of four books. He has over 50 patents filed/awarded and has founded/co-founded four spin-off companies. He serves on technical committees and editorial boards in various capacities. He is a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), Fellow of IEEE (USA), and an IEEE/EDS Distinguished Lecturer.

      Lecture Topics:

      Flexible electronics
      Thin film transistors
      Sensor interfaces
      OLED displays
    • Muhammad Nawaz
      Muhammad  Nawaz portrait
      ABB Corporate Research Forskargränd 7
      Västerås 721 78Sweden
      Phone 1:
      +46 21 345204

      Lecture titles:

      Design and Modeling of Power Semiconductor Devices, Wide
      Bandgap Power Devices, Static and Dynamic Characterization of
      Power Devices, TCAD simulation of Power Semiconductor
      Devices. Design, Modeling and Technology development of Solar
    • Henryk Przewlocki
       - Senior Member
      Henryk Przewlocki portrait placeholder
      Institute of Electron technology
      Al. Lotnikow 32/46
      Warsaw, Mazowsze 02-668
      Phone 1:
      (48-22) 5487750

      (48-22) 8470631
      Lecture Topics: New photoelectric measurement methods of basic MOS structure parameters. Photoemission yield and photoelectron escape depth.
    • Angèle H.M.E. Reinders
      Angèle H.M.E. Reinders portrait
      University of Twente
      Design, Production and Management Faculty of CTW
      PO Box 217
      Enschede 7500 AE
      The Netherlands
      Phone 1:
      31 53 489 3681

      Angèle Reinders is an Associate Professor of Sustainable Energy and Design in the Department of Design, Production and Management of University of Twente, the Netherland. Besides this, she was part-time affiliated with the Design for Sustainability program of Delft University of Technology, the Netherland, till 2015. Her present research focuses on achieving a better integration of photovoltaic (PV) solar energy and other sustainable energy technologies in systems and products by new design approaches. She has practical experience with design-driven research on PV systems, PV modules, PV powered boats, building integrated PV and product integrated PV as well as PV in smart grids. Recently she established the energy center ARISE at the Faculty of Engineering Technology of University of Twente. She has published about 100 papers, edited two books, and is a co-founding editor of IEEE Journal of Photovoltaics. Angèle is intensively involved in the organization of the annual IEEE Photovoltaic Specialists Conference and has a vast international experience and stayed at Fraunhofer ISE (Germany), World Bank (US), ENEA (Italy), Jakarta and Papua (Indonesia) and the Centre for Urban Energy (Canada) for her research. She holds an MSc in Experimental Physics and a PhD in Chemistry from Utrecht University in the field of monitoring and simulation of PV systems. She received her doctoral degree from the Faculty of Chemistry at Utrecht University in 1999. Her PhD dissertation covers the analysis and simulation of the field performance of photovoltaic solar energy systems. Angèle Reinders completed a master degree in Experimental Physics in 1993 at Utrecht University, specializing in material physics and energy physics.
    • Enrico Sangiorgi
       - Fellow
      Enrico Sangiorgi portrait
      University of Bologna
      Via Fontanelle 40
      Forli 47100
      Phone 1:
      +39 0543 374418

      Enrico Sangiorgi (F’05) received the Laurea degree in electrical engineering from the University of Bologna, Italy, in 1979. In 1983, 1984, and 1991, he was a Visiting Scientist at the Center for Integrated Systems, Stanford University, Stanford, California, for approximately three years. From 1985 to 2001, he was a consultant at Bell Laboratories, Murray Hill, NJ, where he was a Resident Visitor for more than three years. In 1993, he was appointed Full Professor of Electronics at the University of Udine, Italy, where he started the Electrical Engineering Program and the microelectronic group. In 2002, he joined the University of Bologna, where he is currently in charge of the nanomicro- electronics group at the Campus of Cesena. From 2005 to 2011 he has been the Director of Consorzio Nazionale Interuniversitario per la Nanoeletronica (IU.NET – Italian Universities Nanoelectronic Team), a Legal Consortium grouping nine University Groups active in the field of Nanoelectronics. In 2005 he has been appointed member of the CATRENE Scientific Committee. Since 2006 he is the Vice Chairman of the Scientific Community Council (SCC) of ENIAC (the European Nanoelectronics Initiative Advisory Council). In 2007 he has been appointed member of the Steering Board of AENEAS, the private section of the ENIAC European Technology Platform. In 2008 he has been appointed CEO of Rinnova srl., a new company founded by the University of Bologna aiming to bring research and innovation to SME’s. From 2008 to 2012 he has been the Dean of the Second School of Engineering at the University of Bologna. In 2012 he has been appointed Director of the Department of Electrical and Electronic Engineering – Guglielmo Marconi – of the University of Bologna. Since 2014 he is the Director of the SINANO Institute, International Organization grouping 23 European Institutions active in the field of nanoelectronics.

      From 1994 to 2009 he has been Editor of IEEE Electron Device Letters. He has been the Guest Editor of several Special Issues on major scientific journals such as IEEE Transactions on Electron Devices, Solid State Electronics, etc. He has been a member of the Technical Committees of several International Conferences on Electron Devices: IEDM (’91-96; ’04-’06), ESSDERC (‘99-present), INFOS (’95-03), ULIS (’00-‘08), etc. Since 2011 he is a member of the Steering Board of the IEEE Journal of Photovoltaics.

      Enrico Sangiorgi is a Fellow of the IEEE, Distinguished Lecturer of the Electron Device Society, he has been Chairman of the Electron Device Society TCAD Technical Committee from 2004 to 2011 member of the Cledo Brunetti Award Committee and Education Award Committee of the EDS. Since 2011 he is elected member of the EDS AdCom. Since 2013 he is a member of the EDS Fellows Evaluation Committee. He has been involved in several European Projects of the 5, 6, and 7 FP with Management Responsibilities, and he has acted as Project Reviewer for the European Commission. The research interests of Enrico Sangiorgi, developed in cooperation with research centers and companies such as Bell Labs., Philips, Infineon Tech., ST Microelectronics, IMEC, and CEA-LETI, include the physics, characterization, modeling, and fabrication of silicon solid-state devices and integrated circuits. In particular he has been working on several aspects of device scaling, its technological, physical, and functional limits, as well as device reliability for silicon CMOS and bipolar transistors. In order to tackle and eventually overcome the hurdles of device scaling, down to the ultimate physical and technological limits, he has devised and developed several original concepts and methods in the characterization and modeling of nanoscale silicon devices. Recently his interests included the physics and modeling of Photo-voltaics devices where he has worked on several aspects of device optimization. Enrico Sangiorgi coauthored 34 papers presented at the International Electron Devices Meeting (IEDM) Conference, and overall more than 250 papers on major journals and conference proceedings.

      Lecture Topics: Nanodevices modeling and simulation Photovoltaics devices and technologies Energy Harvesting devices, technologies and systems

    • Frank Schwierz
       - Emerging Technologies and Devices
      Frank Schwierz portrait
      Technische Universitaet Ilmenau
      FG Festkorperelektronik
      PF 100565
      Ilmenau, Thuringia 98684
      Phone 1:
      49 3677 69 3120

      49 3677 59 3132
      Frank Schwierz received the Dr.-Ing., and Dr. habil. degrees from Technische Universität (TU) Ilmenau, Germany, in 1986 and 2003, respectively. Presently he serves as Privatdozent at TU Ilmenau and is Head of the RF & Nano Devices Research Group. His research interests include novel device and material concepts for future transistor generations, ultra-high-speed transistors, and semiconductor device theory. Currently he is particularly interested in two-dimensional electronic materials. Dr. Schwierz is conducting research projects funded by the European Community, German government agencies, and the industry. Together with partners from academia and industry he was involved in the development of the fastest Si based transistors worldwide in the late 1990s, of Europe's smallest MOSFETs in the early 2000s, and of the worlds fastest GaN HEMT on Si in the 2010s. He has published 250 journal and conference papers including 40 invited papers and is author of three book chapters and of the books Modern Microwave Transistors (J. Wiley & Sons 2003) and Nanometer CMOS (Pan Stanford Publishing 2010). Dr. Schwierz is a Senior Member of the IEEE.
    • Siegfried Selberherr
       - Fellow
      Siegfried  Selberherr portrait placeholder
      Institute for Microelectronics
      Technische Universitat Wien
      Wien A-1040
      Phone 1:
      +43 1 58801 36010

      +43 1 58801 36099
      Lecture Topics: Electromigration Modeling for Microelectronics' Interconnect Structures Current Transport Models for Engineering Applications Modeling Spintronics' Devices
      The Evolution and Potential Future of Microelectronics
      Integrated Gas Sensors for Wearable Electronics
    • Eddy Simoen
       - Senior Member
      Eddy Simoen portrait placeholder
      Kapeldreef 75
      Phone 1:

      Distinguished Lecturer Topics
      1. Low-frequency noise of advanced CMOS devices.
      2. Impact of defects on semiconductor materials and devices.
      3. Defect characterization of high-mobility III-V and III-N semiconductors.
  • Region 9 (Latin America) - EDS Distinguished Lecturers

    • Antonio Cerdeira
       - Senior Member
      Antonio Cerdeira portrait placeholder
      Ave. IPN No 2508
      Mexico City 07360
      Phone 1:
      52 55 5747 3780

      52 55 5747 3978
      Lecture Topics: Modeling of ThinFilm Transistors Modeling of Multigate, FinFETs and Double-Gate Transistors. Non-linear distortion analysis of devices and circuits.
    • Magali Estrada
       - Senior Member
      Magali Estrada portrait placeholder
      Av. IPN No 2508
      Mexico DF CP07360
      Phone 1:
      (52-55) 57473786

      (5255) 57473978
      Lecture Topics:   TFTs, modeling, organic devices
    • Edmundo A. Gutiérrez-D.
       - Thermal Management
      Edmundo A. Gutiérrez-D. portrait
      Instituto Nacional de Astrofisica (INAOE)
      L. E. Erro Nr. 1
      Tonantzintla, Puebla 72840
      Phone 1:
      +52 222 247 0517

      +52 222 247 0517
      Dr. Edmundo A. Gutiérrez-D. got his PhD in 1993 from the Catholic University of Leuven, Belgium with the thesis entitled “Electrical performance of submicron CMOS technologies from 300 K to 4.2 K”. From 1989 to 1993, while working for his PhD, served as a research assistant at the Interuniversity Microelectronics Center (IMEC) in Leuven, Belgium. In 1996 was guest Professor at Simon Fraser University, Vancouver, Canada. In 1996 spent two months as an invited lecturer at the Sao Paulo University, Brazil. In 2000 acted as Design Manager of the Motorola Mexico Center for Semiconductor Technology. In 2002 was invited lecturer at the Technical University of Vienna, Austria. In 2005 joined the Intel Mexico Research Center as technical Director. Currently he holds a Professor position at the National Institute for Astrophysics, Optics and Electronics (INAOE), in Puebla, Mexico. Prof. Gutiérrez-D. is an IEEE senior member since 2008.
      Professor Gutiérrez-D. has published over 100 scientific publications and conferences in the field of semiconductor device physics, has supervised 5 M.Sc. and 10 Ph.D. thesis, and is author of the book “Low Temperature Electronics, Physics, Devices, Circuits and Applications” published by Academic Press in 2000. Prof. Gutiérrez-D. is member of the Mexico National System of Researchers and technical reviewer for the Mexico National Council for Science and Technology (CONACyT).
    • Joao Martino
       - Senior Member
      Joao Martino portrait
      University of Sao Paulo
      Laboratory of Integrated Systems
      Av. Prof. Luciano Gualberto, trav.3, n.158
      San Paulo 05508-010
      Phone 1:
      (11) 3091-5657

      Lecture Topics: 1) SOI MOSFET: Electrical Characterization and Modeling 2) Multiple-Gate Transistors: Device Physics and Characterization 3) Single Transistor Memory Cell: 1T-DRAM 4) Tunnel FET Transistors (triple-gate and nanowire structures) 5) Radiation effects on SOI devices 6) Field Effect Transistor: From MOSFET to Tunnel FET

      Joao Antonio Martino received master (1984) and PhD (1988) degrees in microelectronics from University of Sao Paulo, Brazil. He was a postdoctoral researcher in silicon-on-insulator (SOI) devices and technology in Imec, Belgium. He is currently a full professor and the head of SOI group at University of Sao Paulo. His expertise is in electrical characterization, simulation and modeling of SOI devices in wide temperature range. He is also interested in the SOI-CMOS fabrication process, multiple-gate devices (FinFET), 1T-DRAM, Tunnel-FET and radiation effects. He has authored or coauthored of more than 400 technical journal papers and conference presentation and author/editor of 5 books. He is senior member and distinguished lecturer of the IEEE Electron Device Society (EDS). He is chair of IEEE/EDS South Brazil chapter and vice-chair of SRC IEEE/EDS R9.
    • Roberto Murphy
      Roberto Murphy portrait placeholder
      Instituto Nacional de Astrofisica
      Luis Enrique Erro #1
      Puebla 72840
      Phone 1:

      Lecture topic:

      Characterization of Semiconductor Devices in the High Frequency Regime

      Characterization of the MOS Transistor in the High Frequency Regime

      Sensors for Biomedical Applications

      Integrated Antennas; Past Present and Future
    • Adelmo Ortiz-Conde
       - Senior Member
      Adelmo  Ortiz-Conde portrait
      Silicon and Column IV Semiconductor Devices; Thin Film Transistors
      Universidad Simon Bolivar
      Dpto. de Electronica
      Apartado Postal 89000
      Caracas 1080
      Phone 1:

      Adelmo Ortiz-Conde (S’82, M'85, SM'97) was born in Caracas, Venezuela, on November 28, 1956. He received the professional Electronics Engineer degree from Universidad Simón Bolívar (USB), Caracas, Venezuela, in 1979 and the M.E. and Ph.D. from the University of Florida, Gainesville, in 1982 and 1985, respectively. His doctoral research, under the guidance of Prof. J. G. Fossum, was on the Effects of Grain Boundaries in SOI MOSFET’s.
      From 1979 to 1980, he served as an instructor in the Electronics Department at USB. In 1985, he joined the technical Staff of Bell Laboratories, Reading, PA, where he was engaged in the development of high voltage integrated circuits. Since 1987 he returned to the Electronics Department at USB where he was promoted to Full Professor in 1995. He was on sabbatical leave at Florida International University (FIU), Miami, from September to December 1993, and at University of Central Florida (UCF), Orlando, from January to August 1994, and again from July to December 1998. He also was on sabbatical leave at “Centro de Investigaciones y Estudios Avanzados” (CINVESTAV) National Polytechnic Institute (IPN), Mexico City, Mexico, from October 2000 to February 2001.
      He has coauthored one textbook, Analysis and Design of MOSFETs: Modeling, Simulation and Parameter Extraction (2012 Springer reprint of the original 1st ed. 1998, http://dx.doi.org/10.1007/978-1-4615-5415-8 ), over 170 international technical journal and conference articles (including 18 invited review articles). His present research interests include the modeling and parameter extraction of semiconductor devices.
      Dr. Ortiz-Conde is an EDS Distinguished Lecturer and the Chair of IEEE’s CAS/ED Venezuelan Chapter. He is editor of IEEE Electron Device Letters in the area of Silicon Devices and Technology. He was the Region 9 Editor of IEEE EDS Newsletter from 2000 to 2005. He is a Member of the Editorial Advisory Board of various technical journals: Microelectronics and Reliability, “Universidad Ciencia y Tecnología” and “Revista Ingeniería UC”. He regularly serves as reviewer of several international journals and he was the General Chairperson of the first IEEE International Caribbean Conference on Devices, Circuits, and Systems (ICCDCS) in 1995, Technical Chairperson of the second, fourth and fifth editions of this conference in 1998, 2002 and 2004 respectively, and the Chairperson of the Steering Committee in 2000.

      Lecture Topics: MOSFET threshold voltage extraction methods. Compact models of Double-Gate MOSFETs. Evolution of MOSFETs toward nanoelectronics. Integration-based Methods for Device Parameter Extraction and Distortion Evaluation Modeling. Characterization of Diodes and Solar Cells. Application of Lambert Function.
    • Marcelo Pavanello
       - Device and Process Modeling
      Marcelo Pavanello portrait
      Centro Universitario FEI
      Av. Humberto de Alencar Castelo Branco, 3972
      Sao Bernardo do Campo, Sao Paulo 09850-901
      Phone 1:

      Marcelo Antonio Pavanello (S´99-M´02-SM´05) received the Electrical Engineering degree from FEI University in 1993, receiving the award “Instituto de Engenharia” given for the best student among all the modalities of engineering programs offered at FEI. He received the M. Sc. and Ph. D. degrees in 1996 and 2000, respectively, in Electrical Engineering (Microelectronics) from University of São Paulo, Brazil. From August to December 1998 he was with Laboratoire de Microélectronique from Université Catholique de Louvain (UCL), Belgium, working in the fabrication and electrical characterization of novel channel-engineered Silicon-On-Insulator (SOI) transistors. From 2000 to 2002 he was with the Center of Semiconductor Components and Nanotechnologies, State University of Campinas, Brazil, where he worked as a post-doctoral researcher in the development of a CMOS n-well process. Since 2003 he joined FEI University where he is now Full Professor at Electrical Engineering Department. In 2008 he has been with UCL as a visiting professor.
      Dr. Pavanello is Senior member of The IEEE and Brazilian Microelectronics Society. He is also Research Associate to the National Council for Scientific Development (CNPq), Brazil. Since 2007 he serves as IEEE Electron Devices Society (EDS) Distinguished Lecturer and has been nominated to the Compact Modeling Technical Committee of EDS in 2018.
      He is author and co-author of more than 300 technical papers in peer-reviewed journals and conferences, and author/editor of 6 books. Dr. Pavanello coordinates several research projects fomented by Brazilian agencies like FAPESP, CNPq and Capes. He also supervised several Ph. D. dissertations, M. Sc. thesis and undergraduate projects in Electrical Engineering.
      His current interests are the compact modeling, fabrication, electrical characterization and simulation of SOI CMOS transistors with multiple gate configurations and silicon nanowires; the wide temperature range of operation of semiconductor devices; the digital and analog operation of novel channel-engineered SOI devices and circuits.
    • Jacobus W. Swart
       - Senior Member
      Jacobus W.  Swart portrait placeholder
      FEEC/UNICAMP - State University of Campinas
      Av. Albert Einstein 400
      Campinas, Sao Paul 13.083-970
      Phone 1:
      +55 19 3746 6001

      Lecture Topics: MEMS, sensors, ISFET, CNT and graphene, Advanced CMOS processes
    • Gilson Wirth
      Gilson Wirth portrait placeholder
      AV. Osvaldo Aranha
      103 UFRGS - Engenharia Eletrica
      Porto Alegre, RS
      RS 90035-190
      Phone 1:

      Distinguished Lecturer Titles
      Charge Trapping Phenomena in MOSFETS: From Noise to Bias Temperature Instability. Reliability of Nanoscale Semiconductor Devices.
  • Region 10 (Asia and Pacific) - EDS Distinguished Lecturers

    • Navakanta Bhat
      Navakanta Bhat portrait placeholder
      Indian Institute of Science
      Brief bio:
      Navakanta Bhat received his Ph.D. in Electrical Engineering from Stanford University, in 1996. Then he worked at Motorola’s Advanced Products R&D Lab in Austin, TX until 1999. He is currently a Professor at the Indian Institute of Science (IISc), Bangalore. His current research is on Nanoelectronics and Sensors. He has more than 200 publications and 20 patents. He was instrumental in creating the National Nanofabrication Centre (NNfC) at IISc, benchmarked against the best university facilities in the world. He is the recipient of IBM Faculty award and Outstanding Research Investigator award (Govt. of India). He is a Fellow of INAE. He was the Editor of IEEE Transactions on Electron Devices, during 2013-2016. He is the member of the National Innovation Council in Nanoelectronics. He is the founder and promoter of a startup called “PathShodh Healthcare”, which builds point-of-care diagnostics for diabetes and its complications.

      Distinguished Lecturer Topics:
      1. Nanotransistors with 2D materials : Opportunities and Challenges

      2. Electrochemical Biosensors for managing Diabetes and its Complications

      3. Single Chip Metal Oxide Gas Sensor Array for Environment Monitoring

      4. Nanostructured High Performance Gas sensors
    • Yang Chai
      Yang Chai portrait placeholder
      Room CD 604, Dept. of Applied Physics
      The Hong Kong Polytechnic University
      Hung Hom, Kowloon, Hong Kong 0000
      DL Topic: Two-dimensional layered materials for future nanoelectronics­
      transistor and interconnect

      Yang Chai received the B.S. degree in physics from Nanjing University, Nanjing, China in 2001, the
      M.S. degree in
      electronics from Peking University, Beijing, China in 2005, and the Ph.D. degree in electronic and
      computer engineering from the Hong Kong University of Science and Technology in 2009. His PhD
      research includes carbon nanotube for interconnect applications.
      After he conducted his Postdoctoral studies in Prof. Philip Wong's group at Stanford University and
      Prof. John
      Rogers's group at University of Illinois at Urbana & Champaign, he joined the Department of Applied
      Physics in the Hong Kong Polytechnic University in 2012 as an Assistant Professor. He is an author
      of two book chapters and over 60 technical papers. His current research interest includes emerging
      memories and low-dimensional materials and devices.
    • Mansun J. Chan
      Mansun J.  Chan portrait
      Hong Kong University of Science and Tech.
      Dept. of Electronic and Computer Eng.
      Clear Water Bay, Kowloon, Hong Kong
      Phone 1:
      +852 2358 8519

      +852 2358 1485
      Email 1:

      Lecture Topics:  1) Nano-device physics and technology 2) Device modelling and circuit simulation 3) Non-volatile memory technology 4) Bio-sensors and circuits MANSUN CHAN received his MS and Ph.D. from the University of California at Berkeley. He is currently a Professor at the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). His main research covers novel silicon device fabrication and modeling. In particular, he is one of the key developers of the BSIM model series that have been selected to be the industrial standard models for conventional and SOI MOSFETs used by the semiconductor industry worldwide. Prof. Chan has served IEEE in various capacities and he is currently a Distinguished Lecturer of IEEE EDS.

      Biography:  Mansun Chan (S’92-M’95-SM’01-F’13) received Ph.D. degrees from the UC, Berkeley in 1995. He is one of the major contributors to the unified BSIM model for SPICE, which has been accepted by most US companies and the Compact Model Council (CMC) as the first industrial standard MOSFET model. In January 1996, he has joined the EEE faculty at Hong Kong University of Science and Technology.  After that, he developed a SOI MOSFET model, which has been adopted by UC Berkeley as the core of the BSIMSOI model.  Between July 2001 and December 2002, he was a Visiting Professor at University of California at Berkeley and the Co-director of the BSIM program.  In this capacity, he has successfully completed the technology transfer of BSIM3SOI to be the first industrial standard SOI MOSFET model.  In addition to device modeling, Prof. Chan’s current research interests also include nano-transistor fabrication technology, carbon-based device physics, printable transistors, 3D integrated circuits, bio-sensors and cloud computing based simulation platform.  He is current working on an interactive modeling and online simulation (i-MOS) platform to facilitate the interactions between model developers and circuit designers using the Internet technology.

      Prof. Chan is a recipient of the UC Regents Fellowship, Golden Keys Scholarship for Academic Excellence, SRC Inventor Recognition Award, Rockwell Research Fellowship, R&D 100 award (for the BSIM3v3 project), Teaching Excellence Appreciation award, Distinguished Teaching Award and the Shenzhen City Technology Innovation Award by the Chinese Government. He is a Fellow and Distinguished Lecturer of IEEE.

    • Edward Yi Chang
       - Senior Member
      Edward Yi Chang portrait placeholder
      National Chiao Tung university
      1001 Ta Hsueh Road,
      Dept of Materials Science
      Hsinchu, Taiwan 30010
      Phone 1:

      Lecture Topics: GaN Electronics for power and RF applications
      InGaAs FinFet device for low power logic applications
      InAs HEMT for High frequency applications
    • Kuei-Shu Chang-Liao
      Kuei-Shu Chang-Liao portrait placeholder
      101, Sec. 2, Kuang-Fu Rd. • Dept of Engineering and System Sci.,
      National Tsing Hua University
      Phone 1:

      Lecture topics
      1. High-k Gate Dielectric and Interface Engineering for Ge MOSFETs
      2. Engineering Dielectric and Channel Materials in Flash Devices for 3D
      Memory Applications
      3. SiGe or Si/Ge Super-lattice Buried Channel for FinFETs
    • Yogesh Singh Chauhan
       - Device and Process Modeling
      Yogesh Singh Chauhan portrait
      Indian Institute of Technology (IIT) Kanpur
      Department of Electrical Engineering
      Kanpur, U.P. 208016
      Phone 1:

      Phone 2

      Phone 3:
      +91-8853669988 (mobile)

      Yogesh Singh Chauhan (SM'12) is an associate professor at IIT Kanpur, India. He was with Semiconductor Research & Development Center at IBM in 2007 – 2010, Tokyo Institute of Technology in 2010 and University of California Berkeley in 2010-2012. He is the lead developer of industry standard BSIM-BULK (formerly BSIM6) model. He is the co-developer of ASM-HEMT model for GaN HEMTs, which is under industry standardization at the Compact Model Coalition (CMC). He was technical program committee member of IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2013 and IEEE European Solid-State Device Research Conference (ESSDERC) 2016/2017. He is the member of IEEE-EDS Compact Modeling Committee. He received Ramanujan fellowship in 2012, IBM faculty award in 2013 and P. K. Kelkar fellowship in 2015. His research interests are characterization, modeling, and simulation of semiconductor devices.
    • Albert Chin
       - Fellow
      Albert Chin portrait
      Thin Film Transistors
      National Chiao Tung University
      Dept. of Electronics Engineering
      Hsinchu Taiwan
      Phone 1:

      Lecture Topics: Ultra-low power & energy-efficient green electronic devices
      Three-Dimensional Technologies toward Brain-Mimicking IC Hardware

      Biography: Albert Chin received Ph.D. from University of Michigan, Ann Arbor, in 1989 and B.S. from National Tsing Hua University in 1982.
      He was with AT&T Bell Labs, General Electric E-Lab, and Texas Instruments SPDC. He has been a professor, vice executive officer of diamond project and deputy director of National Chiao Tung University, and a visiting Professor at National University of Singapore.
      He is a pioneer on low DC-power high-κ CMOS, high-κ Flash memory, high mobility Ge-On-Insulator, low AC-power 3D IC, high power asymmetric-MOSFET, Si fs/THz devices, and resonant-cavity photo-detector. He co-authored >500 papers and 7 “Highly Cited Papers” (top 1% citation). His high-κ CMOS, GeOI, Flash memory, and RF devices were also cited by ITRS www.itrs.net
      Dr. Chin has served as Subcommittee Chair and Asian Arrangements Chair of IEDM Executive Committee, Editor of IEEE Electron Device Letters, Guest Editor & Editor-in-Chief of IEEE JEDS Special Issue on Advanced Technology for Ultra-Low Power Electronic Devices, and IEEE EDS Technical Committee Chairs on both Electronic Materials and Compound Semiconductor Devices & Circuits. He is an IEEE Fellow, Optical Society of America Fellow, and Asia-Pacific Academy of Materials Academician.
    • Steve S. Chung
       - Fellow
      Steve S.  Chung portrait
      National Chiao Tung University
      Dept. of Electronics Engineering
      1001 University Road
      Hsinchu 300
      Phone 1:
      +886 3 5731830

      +886 3 5734608

      Lecture Topics:  1. The Variability Issues of Small Scale CMOS Devices 2. Extension of Moore's Law Via Strained Technologies 3. Fundamentals of RTN and Its applications to CMOS and Nonvolatile Memories 4. Random Dopant Variations of Trigate CMOS Devices

      Biography:  STEVE S. CHUNG (S'83-M'85-SM'95-F'06) received his Ph.D. degree from the University of Illinois at Urbana-Champaign, in Electrical Engineering in 1985. His Ph.D. thesis advisor is the world-famous scholar and CMOS Co-Inventor, Prof. C. T. Sah.

      Currently, he is a Chair Professor and UMC Research Chair Professor at the National Chiao Tung University (NCTU).  After joining NCTU in 1987, he has been the first Department Head of EECS Honors Program, to promote an undergraduate program for academic excellence from 2004-2005. Later, he was also the Dean of International Affairs Office, Executive Director of school level research center, between 2007-2008. He was a Research Visiting Scholar with Stanford University in 2001, visiting professor to University of California-Merced in 2009-2010, and a guest lecturer at Stanford in the Fall of 2009. He was also the consultant to the two world largest IC foundries, TSMC and UMC, on developing CMOS and flash memory technologies. His recent current research areas include- nanoscale CMOS devices and technology; nonvolatile memory technology and reliability; and reliability physics/interface characterization. He has published more than 220 journal and conference papers, one textbook, and holds more than 20 patents. Since 1995, he has presented more than 22 times in the IEEE flagship conferences, IEDM and VLSI. In particular, he was the first (from Taiwan) to present the paper at VLSI Technology symposium in 1995.

      He is an IEEE Fellow, the current IEEE EDS BoG(Board of Governor) member, IEEE Distinguished Lecturer, EDS Regions/Chapters Chair, and with past involvement as EDS AdCom member (2004-2009), EDS Regions/Chapters Vice-Chair, Guest Editor of TDMR, and Editor of EDL(2002-2008). He has served on various IEEE conference committees, e.g., VLSI Technology, IEDM, IRPS, IPFA, ICMTS, SNW, VLSI-TSA etc. Also, he has served as the TPC Vice-Chair and subsequently the organizing member of SSDM in Japan. ED Taipei chapter was awarded the 2002 EDS Chapter of the Year Award under his leadership as the chapter chair. He was awarded 3 times outstanding Research Award, distinguished PI, and distinguished NSC Research Fellow, from the National Science Council, as well as Distinguished EE Professor and Engineering Professor of the Engineering Societies in Taiwan. More recently, he was also honored the recipient of 2013 Pan Wen Yuan award in recognizing his outstanding achievements in the semiconductor research.

    • Gana Nath Dash
       - Senior Member
      Gana Nath Dash portrait placeholder
      Sambalpur University
      SAMBALPUR, ODISHA 768004
      Phone 1:
      91 663 2541223

      91 663 2430158

      Lecture Topics:

      1. Emerging trends in 2Terminal Microwave devices
      2. Emerging trends in 3Terminal Microwave devices
      3. Noise in Terahertz IMPATT diode
      4. Prospects of graphene and carbon nanotube in field effect devices
      5. MITATT and TUNNETT mode in WBG Terahertz IMPATT diode
      6. New Concept Devices

    • Abhisek Dixit
      Abhisek Dixit portrait
      Dept of Electrical Engr
      Indian Institute of Technology Delhi
      Department of Elec Engr Indian Inst of Tech
      Hauz Khas
      New Delhi 110016
      Phone 1:

      Distinguished Lecture Titles:
      CMOS logic device scaling
      Negative Capacitance FETs
      Gamma and Heavy Ion Irradiation Effects in CMOS
      CMOS-RF models
      CMOS Thermal Effects and Modeling

      Dr. Abhisek Dixit is currently an Associate Professor in the Department of Electrical
      Engineering, Indian Institute of Technology Delhi, New Delhi, INDIA. Other positions he
      held prior to this include Assistant Professor of Electrical Engineering at IIT Delhi and
      Advisory Research Engineer at IBM SRDC. Dr. Dixit received his PhD from K. U.
      Leuven/IMEC BELGIUM in 2007 and MTech from IIT Bombay, INDIA in 2002. He has
      worked on fabrication, characterization, compact and TCAD modeling of devices and
      circuits on various 300 and 200-mm technologies, including bulk Si, PD and FD-SOI,
      BiCMOS. Although his modeling and characterization work spans range of technology
      nodes all the way from 10-nm up to 0.35-micron, in his early career he focused on SOI-
      FinFET device-technology integration at 45, 32, 14-nm nodes. His current research
      interests include CMOS reliability including hot-carrier degradation and radiation
      hardness, pulsed/RF characterization and modeling of logic devices, and device scaling
      of SOI, nanowire, nanosheet, and negative capacitance-FETs beyond 7-nm nodes. Dr.
      Dixit has more than 60 publications and 4 patents in FinFET and related technologies
      and he is a senior member of IEEE since 2013.
    • Lorenzo Faraone
       - Senior Member
      Lorenzo  Faraone portrait placeholder
      University of Western Australia
      School of EECE
      35 Stirling Hwy
      Phone 1:
      +61 8 93803104

      +61 8 6488 3104
      Lecture Topics: Optical MEMS for on-chip infrared spectroscopy and multi-spectral imaging
      Semiconducting infrared materials, MBE growth, devices and technology Mobility spectrum analysis of carrier transport in semiconductors
    • Anisul Haque
       - Compound Semiconductor Devices
      Anisul Haque portrait
      East West University
      Department of EEE, East West University, Aftabnagar
      43 Mohakhali C/A
      Dhaka, Bangladesh 1212
      Phone 1:

      Prof. Anisul Haque is currently the Chairperson, Department of Electrical and Electronic Engineering at East West University. He has also served as the Dean, Faculty of Sciences and Engineering, East West University from December 2007 to December 2008. He received his PhD from Clarkson University, USA in 1996 and MS from Texas A & M University, USA in 1992. He also earned another MS from Bangladesh University of Engineering and Technology (BUET), Bangladesh in 1989 and BS from BUET in 1987. Prof. Haque started his academic career as a lecturer in the EEE Department, BUET. He was a professor in the same department until December 2005. He was a Visiting Researcher with the Research Center for Quantum Effect Electronics, Tokyo Institute of Technology, Japan, from 2002 to 2004. Prof. Haque has also been a Visiting Faculty Member with Clarkson University (1997, 1998 and 2001), University of Connecticut, Storrs (1999), and the Tokyo Institute of Technology (2005).
      Prof. Haque’s research interests are in physics, modeling, simulation, and characterization of nano-scale electronic and photonic devices. His current activities include modeling and characterization of MOSFETs on high-mobility substrates, compact modeling of MOSFETs and investigation of novel properties of strained GaInAsP low dimensional structures. He is also interested in engineering education. Prof. Haque has published around 40 papers in refereed international journals. Prof. Haque is a senior member of IEEE and is a life member of Bangladesh Physical Society. He is the founding Chair of IEEE Electron Devices Society, Bangladesh Chapter. Prof. Haque has been serving as a Distinguished Lecturer of IEEE Electron Devices Society since 2009. He is the recipient of the University Grants Commission Award 2006 for research in engineering and technology.
    • Jr-Hau He
      Jr-Hau He portrait placeholder
      Associate Professor of Electrical Engineering
      King Abdullah University of Science and Technology
      Room 3217, Building 3
      King Abdullah University of Science & Technology
      Mail Box 3944, 4700 KAUST, Building 3
      Thuwal,, JeddahSaudi Arabia
      Phone 1:

      Distinguished Lecturer Titles:
      1) Photon managements by employing nanostructures for optoelectronic devices
      2) Photon managements by employing nanostructures for solar devices
      3) Photon managements in 2D materials.
      4) Paper electronics
    • Ru Huang
       - MOS Devices and Technology
      Ru Huang portrait
      Peking University
      Institute of Microelectronics
      Beijing 100871
      Phone 1:
      86 10 6275 7761

      86 10 6275 1789 -7761
      Ru Huang (M’98–SM’06) received the B.S. (highest honors) and M.S. degrees in electronic engineering from Southeast University, Nanjing, China, in 1991 and 1994, respectively, and the Ph.D. degree in microelectronics from Peking University, Beijing, China, in 1997.
      In 1997, she joined the faculty of Peking University, where she is currently a Professor and the Head of the Department of Microelectronics. Since 2000, she has been the leader of several State Key Research Projects of China in device research and IC fabrication technology research, including major state basic research projects, 863 national projects, the key project from National Natural Science Foundation, as well as several collaborative projects with Samsung, Intel and Fujitsu Corporations. Her research interests include nano-scaled CMOS devices, nonvolatile memory devices and new devices for RF and harsh environment applications. She holds 21 granted patents, and has authored/co-authored 4 books and over 180 papers, including many conference invited papers. Dr. Huang is the winner of the National Science Fund for Distinguished Young Scholars and many other awards in China, including the National Youth Science Award, Science and Technology Progress Award from Ministry of Information Industry and Ministry of Education. She serves as a member of IEEE Electron Devices Society (EDS) AdCom and the associate chief editor of Science in China. She was the Technical Program Co-Chair of the 7th and 9th International Conference on Solid State and Integrated Circuit Technology (ICSICT 2004 and 2008), a Far East Committee Member of the 2004 International Solid State Circuits Conference (ISSCC), and committee members of many other international conferences and symposiums.
    • Hiroshi Iwai
       - Fellow
      Hiroshi  Iwai portrait
      Tokyo Institute of Technology
      4259 Nagatsuta, Aobaku
      Yokohama 226-8502
      Phone 1:

      +81 45 924 5584

      Lecture Topics: Future of Nano CMOS Technology

    • Brajesh Kumar Kaushik
       - Emerging Technologies
      Brajesh Kumar Kaushik portrait
      Indian Institute of Technology
      Indian Inst of Technology - Roorkee
      Phone 1:

      Dr. Brajesh Kumar Kaushik (S’07–M’09–SM’13) received his Ph.D. degree in 2007 from Indian Institute of Technology Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of Technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been working as an Associate Professor. He has authored and reviewed several research publications in renowned journals, national and international conferences. He is a Senior Member of IEEE and holds the position of Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics. He has received many awards for his significant contribution to the scientific community. His research interests include spintronics-based devices and circuits, high-speed interconnects low-power VLSI design, memory design, carbon nanotube-based designs, organic electronics, FinFET device circuit co-design.
    • Ming-Dou Ker
       - Editor
      Ming-Dou Ker portrait
      National Chiao Tung University, Taiwan
      Electronics Engineering
      1001 University Road
      Hsinchu 300
      Phone 1:


      Lecture Topics:

      [1] On-Chip ESD Protection Design in Nano CMOS.

      [2] ESD Protection Design for RF and Giga-Hz I/O Circuits.

      [3] System-Level ESD Protection: chip-level and board-level solutions.

      [4] Transient-Induced Latchup in CMOS ICs. [5] ESD Protection in HV CMOS.

    • Anil Kottantharayil
      Anil Kottantharayil portrait placeholder
      Dept of Electrical Engineering, IIT Bombay, Powai
      Mumbai 400076
      Phone 1:
      91 22 2576 7438

      Lecture Topics
      1. Graphene for charge storage in flash memory devices
      2. Performance and reliability of photovoltaic modules
      3. Recent advances in silicon solar cells
    • M.Jagadesh Kumar
       - Senior Member
      M.Jagadesh  Kumar portrait
      Indian Institute of Technology, Delhi
      Professor of Electrical Engineering
      Hauz Khas, New Delhi 110016
      Phone 1:
      +011-2659 1085

      Phone 2
      +011-2659 1959

      Lecture Topics: 1) Nanowire electronics: the future of CMOS technology 2) Green Transistors for energy efficient integrated circuits 3) Can Bipolar Transistors be made without doping? 4) Tunnel field effect transistors: Design and Optimization 5) Trench power MOSFETs: Design and Optimization 6) Perspectives on the evolution of semiconductor manufacturing: Enabling the impossible

      Dr. Kumar is currently the NXP (Philips) Chair Professor established at IIT Delhi by Philips Semiconductors, Netherlands (now NXP Semiconductors India Pvt Ltd). He was the Co-ordinator of VLSI Design, Tools and Technology interdisciplinary program. He is a Chief Investigator of the Nano-scale Research Facility (NRF) at IIT Delhi. Dr. Kumar received the 2013 Award for Excellence in Teaching (in large class category) from IIT Delhi. He works in the area of Nanoelectronic Devices, Device modeling and simulation, IC Technology and Power semiconductor devices. He has published extensively in the above areas with four book chapters and more than 160 publications in refereed journals and conferences. He is on the Editorial Board of Scientific Reviews, an online and open access primary research publication from the publishers of Nature. He is an Editor of IEEE Transactions on Electron Devices and the Editor-in-Chief of IETE Technical Review. Dr. Kumar is a Fellow of Indian National Academy of Engineering, The National Academy of Sciences, India, and The Institution of Electronics and Telecommunication Engineers, India. He has been awarded the 29th IETE Ram Lal Wadhwa Gold Medal for distinguished contribution in the field of Semiconductor device design and modeling. He has received the first ever ISA-VSI TechnoMentor Award given by the India Semiconductor Association to recognize a distinguished Indian academician and researcher for playing a significant role as a mentor and researcher. He is a recipient of 2008 IBM Faculty award in recognition of professional achievements. He has delivered a number of invited lectures in conferences and workshops in India and abroad to large audiences on topics related to Nanoelectronics. For more details on Dr. Kumar, you can visit http://web.iitd.ac.in/~mamidala

    • Chao-Sung Lai
      Chao-Sung    Lai portrait placeholder
      259 Wen-Hua 1st Road
      Phone 1:
      866 3 2118800 ext. 5786

      Lecture Topics:

      1. Field-effect-transistor for chemical and bio sensing applications

      2. Graphene transistor with fluorinated dielectrics and isolation.

      3. Flash memory with metal and metal oxide nano-crystal.
    • Mario Lanza
       - Senior Member
      Mario Lanza portrait
      Soochow University
      199 Ren Ai Road, Bldg 910, Room 316
      Suzhou Industrial Park
      Suzhou 215123
      Phone 1:

      Mario Lanza got his PhD in Electronic Engineering (with honors) in 2010 at the Universitat Autonoma de Barcelona. During the PhD he was visiting scholar at the Deggendorf Institute of Technology (Germany, 2008) and University of Manchester (UK, 2009). During his PhD he analyzed high-k dielectric samples from Infineon Technologies and Numonyx. In 2010-2011 he did a postdoc at Peking University, and in 2012-2013 he was a Marie Curie fellow at Stanford University. On October 2013 he joined Soochow University as Associate Professor, and in 2017 he was promoted to Full Professor. Currently, Prof. Lanza leads a group formed by 17-20 graduate students and postdocs, and it focuses on the improvement of electronic devices using 2D materials. Prof. Lanza has published over 90 research papers (including Science, Nature Electronics, IEDM Tech Digest, and Advanced Materials) edited an entire book on Conductive Atomic Force Microscopy for Wiley-VCH, and registered four patents (one of them granted with 1 million USD investment). He is a member of the technical committee of several top conferences in the field of electronic devices (IEDM, IRPS, IPFA), and member of the advisory board of Advanced Electronic Materials, Nature Scientific Reports, Nanotechnology, Nano Futures and Crystal Research and Technology. Prof. Lanza has received some of the most important research awards at his stage, including the 2017 Young Investigator Award in the field of Microelectronic Engineering (Elsevier), the Young 1000 Talent (Ministry of Education of China), and the Marie Curie postdoctoral fellowship (European Union). In 2019 he was selected as Distinguished Lecturer by the Electron Devices Society.

      Lecture title:
      Two-dimensional materials based electronic devices
    • Pei-Wen Li
      Pei-Wen Li portrait placeholder
      ED617, Department of Electronics Engineering, National Chiao Tung
      University, 1001 University Road,
      Hsinchu 300Taiwan
      Phone 1:

      Lecture Titles
      1.Designer Ge quantum-dot phototransistors for highly-integrated,
      broadband optical interconnects
      2.Germanium quantum dots for functional charge sensing/metrology
      3.The Unique Optoelectronic and Energy-Conversion Devices based on
      Ge/Si/O Interactions
    • H.C. Lin
      H.C. Lin portrait placeholder
      ED-624, Dept. of Electronics Engineering
      1001 University Road
      Hsinchu City 300
      Phone 1:
      886-3-5712121 ext. 54193

      Lecture topics:

      1. Film-profile engineering in the fabrication of oxide-based TFTs

      2. Poly-Si nanowire device technology

      3. Poly-Si-based non-volatile memory device technology
    • Souvik Mahapatra
       - Fellow Member
      Souvik Mahapatra portrait placeholder
      IIT Bombay
      Dept. of Electrical Engineering
      Maharashtra , Powai, Mumbai 400076
      Phone 1:
      +91 22 2572 0408

      Souvik Mahapatra received his PhD from IIT Bombay in 1999. During 2000-01, he was with Bell Laboratories, Murray Hill, NJ, USA. Since 2002, he is with the Department of Electrical Engineering at IIT Bombay and presently a full professor. His current research interests are CMOS device scaling and reliability, and device-circuit co-design for co-optimisation of power, performance and reliability. He has published more that 150 papers in peer reviewed journals and international conferences, delivered invited talks at major international conferences including IEEE IEDM and IRPS, and has been actively collaborating with several global semiconductor industries. He is a fellow of IEEE (for contributions to CMOS transistor gate stack reliability), fellow of Indian National Academy of Engineering, fellow of Indian Academy of Sciences, and a distinguished lecturer of IEEE Electron Devices Society.
    • Shunri Oda
       - Fellow
      Shunri Oda portrait placeholder
      Tokyo Institute of Technology
      2-12-1 O-Okayama, Meguro-ku
      Tokyo 152-8552
      Phone 1:

      Lecture Topics:  Silicon Quantum Dot Devices. NeoSilicon Based Nanoelectromechanical Information Devices
    • Taiichi Otsuji
       - Fellow
      Taiichi Otsuji portrait
      Tohoku University
      2-1-1 Katahira, Aoba-ku
      Sendai, Miyagi 9808577
      Phone 1:
      81 22 217 6104

      81 22 217 6104
      Lecture Topics:  Recent advances in terahertz 2D electronic, optoelectronic and plasmonic devices and systems
    • Ajit Panda
      Ajit Panda portrait placeholder
      National Inst. of Science & Technology (NIST)
      Berhampur, Odisha 761 008
      Suggested Lecture Titles
      -Two and Three terminal Semiconductor Devices for High Frequency Communication Circuit

      Dr. Panda has been awarded CSIR and BOYSCAST fellowship of Government of India, ICTP Regular Associateship award of UNESCO, member of NAAC Assessment Committee, Mentor of DST INSPIRE program of Govt of India, and Technocrats of the year award of Odisha in 2015. He has completed more than 10 Government funded projects of more than 10 million dollars, is a co-author of the book Physics of Semiconductor Devices, faculty counselor EDS Students Chapter. He was in University of Michigan, USA for a year as a visiting fellow. He has visited and delivered lecture in countries like USA, Italy, German, France, Singapore, Hong Kong, Malaysia, Nepal, Bangkok. He has published 70Journal papers and 100 conferences papers in Semiconductor Devices area. He is a senior member of IEEE, VSI, IETE, ISTE. Seven students have awarded PhD under his guidance. He is a regular reviewer of more than 10 indexed journals.
    • M.K. Radhakrishnan
       - Senior Member
      M.K.  Radhakrishnan portrait
      NanoRel Technical Consultants
      273, 18D Main, 6th Block
      Koramangla, Bangalore 560095
      Phone 1:
      +65 9624 7575

      Phone 2
      +91 9447663869

      Lecture Topics:MK Radhakrishnan (M’82, SM’94, LSM’18) is the Founder Director of NanoRel LLP -Technical Consultants providing analysis-based solutions to micro and nano electronic industries for improving reliability of devices. As a researcher in the area of semiconductor device failure physics for more than 35 years, he worked with industries (ST Microelectronic and Philips), research institutions (Institute of Microelectronics, Singapore and Indian Space Research Organization) and in academia with National University of Singapore. As a technical consultant he works with many MNCs and also provides training on device failure analysis & reliability to various Industries, Universities and Research Centres.

      Lecture Topics
      1. Circa 70 – Semiconductor Device Progression and Challenges towards Nanoera.
      2. Interface Physics and Analysis Challenges in Silicon Nanodevices
      3. Are the Progressions towards the “Benefit of Humanity”? - A Failure Analyst’s View

    • Ramgopal Rao
       - Senior Member
      Ramgopal  Rao portrait placeholder
      IIT Bombay
      Dept. of Electrical Engineering
      Powai, Mumbai 400076
      Phone 1:
      +91 22 25767456

      Lecture Topics: Nanotechnology, MEMS, NEMS, Sensors
    • Tian-Ling Ren
       - Senior Member
      Tian-Ling  Ren portrait
      Tsinghua University
      Institute of Microelectronics
      Beijing 100084
      Phone 1:
      +86 10 6278 9151

      Phone 2
      Ext. 311

      Lecture Topics: New Material Based Micro/Nano Devices Flexible Electronics Novel Acoustic and RF Devices Non-volatile Memory

      Biography: Tian-Ling Ren received his Ph.D. degree in solid-state physics from Department of Modern Applied Physics, Tsinghua University, China in 1997.

      He is full professor of Institute of Microelectronics, Tsinghua University since 2003. He has been a visiting professor at Electrical Engineering Department, Stanford University from 2011 to 2012.

      For these years, Prof. Ren’s research mainly focused on novel micro/nano electronic devices and key technologies, including nonvolatile memories (RRAM, FeRAM), RF devices (resonator, inductor), sensors, and MEMS. Prof. Ren’s main contributions are that he has developed the new integration methods for novel material based micro/nano device and circuit applications. For examples, he proposed the RRAM structure with integration of single layer graphene, which can drastically decrease the power consumption of the device; he developed the ferroelectric thin film based integrated acoustic devices; he also proposed the graphene sound source devices for the first time; and he realized the high quality ultra-flexible structured RF resonators with very promising applications. He has published more than 300 journal and conference papers. He has more than 40 patents.

      He has been an Elected Member at Large, and Distinguished Lecturer of IEEE Electron Devices Society. He is also Council Member of Chinese Society of Micro/Nano Technology. For these years, Prof. Ren has been the technical committee member for several leading international conferences, including International Electron Device Meeting (IEDM), and Device Research Meeting (DRC). He is also editorial board member of Scientific Reports (Nature Publishing Group).

    • Chandan Sarkar
      Chandan Sarkar portrait placeholder
      Jadavpur University
      Dept. of Electronics and Telecomm. Eng.
      Kolkata 700032
      Phone 1:
      +91 94 3380 8582

      +91 33 2414 6217
      Lecture Topics: Advance CMOS FOR Analog and RF application CMOS based Memory devices
    • Subir Kumar Sarkar
      Subir Kumar Sarkar portrait placeholder
      Jadavpur University
      Dept. of Electronics & Telecommunication Engr.
      188 Raja S.C. Mullick Road, Jadavpur
      Kolkata, West Bengal 700032
      Phone 1:

      Lecture topics:
      1. SOI/SON: An innovative device with greatly enhanced performance.

      2. Future Nanoscale devices: Challenges and opportunities.

      3. Design challenges for low power VLSI circuits

      1. SOI/SON: An innovative device with greatly enhanced performance.

      2. Future Nanoscale devices: Challenges and opportunities.

      3. Design challenges for low power VLSI circuits
    • Manoj Saxena
      Manoj Saxena portrait
      Deen Dayal Upadhyaya College
      University of Delhi
      Sector 3, Dwarka
      New Delhi 110078
      Manoj Saxena is an Associate Professor in Department of Electronics, Deen Dayal Upadhyaya College, University of Delhi, New Delhi, India. He received B.Sc. (with honors), M. Sc., and Ph.D. degrees from the University of Delhi in 1998, 2000, and 2006 respectively. He has authored or coauthored 210 technical papers in international journals and various international and national conferences. His current research interests are in the areas of analytical modeling, design, and simulation of Optically controlled MESFET/MOSFET, silicon-on-nothing, insulated-shallow-extension, grooved/concave-gate MOSFETs, cylindrical gate MOSFET and Tunnel FET. He is a reviewer to many journals including Solid State Electronics, Journal of Physics: D Applied Physics and IEEE TED and EDL. Manoj is a Senior Member of IEEE and also Member of Institute of Physics (UK), Institution of Engineering and Technology (UK), National Academy of Sciences India (NASI) and International Association of Engineers (Hong Kong). Currently, he is the Secretary of EDS Delhi Chapter. For his voluntary contribution, Manoj received the outstanding EDS Volunteer recognition from EDS Chapters in the region in 2012.

      Lecture Topics:
      Dielectric Pocket MOSFET: A Novel Device Architecture
      Embedded Insulator based Novel Nanoscaled Novel MOSFET Structures
      Tunnel Field Effect Transistor and its Application as Highly Sensitive and Fast Biosensor
      Modeling and Simulation of Tunnel Field Effect Transistor
      Dual Material Junctionless Double Gate Transistor for Analog and Digital Performance
    • Cher Ming Tan
       - Editor
      Cher Ming Tan portrait
      Chang Gung University
      259 Wen Hua 1st Road
      Phone 1:
      +886-32118800 Ext 5952

      Dr. Tan received his Ph.D in Electrical Engineering from the University of Toronto in 1992. He has 10 years of working experiences in reliability in electronic industry (both Singapore and Taiwan) before joining Nanyang Technological University (NTU) as faculty member in 1996 till 2014. He joined Chang Gung University, Taiwan and set up a research Center on Reliability Sciences and Technologies in Taiwan and acts as Center Director. He is Professor in Electronic Department of Chang Gung University, Honorary Chair Professor in Ming Chi University of Technology, Taiwan. He has published 300+ International Journal and Conference papers, and giving 10+ keynote talks and 50+ invited talks in International Conferences and several tutorials in International Conferences. He holds 12 patents and 1 copyright on reliability software. He has written 4 books and 3 book chapters in the field of reliability. He is an Editor of Scientific Report, Nature Publishing Group, an Editor of IEEE TDMR and Series Editor of SpringerBrief in Reliability. He is a member of the advisory panel of Elsevier Publishing Group. He is also in the Technical committee of IEEE IRPS.
      He is a past chair of IEEE Singapore Section, senior member of IEEE and ASQ, Distinguish Lecturer of IEEE Electronic Device Society on reliability, Founding Chair and current Chair of IEEE Nanotechnology Chapter - Singapore Section, Fellow of Institute of Engineers, Singapore, and Fellow of Singapore Quality Institute. He is the Founding Chair of IEEE International Conference on Nanoelectronics, General Chair of ANQ Congress 2014. He is also the recipient of IEEE Region 10 Outstanding Volunteer Award in 2011. He is Guest Editor of International J. of Nanotechnology, Nano-research letter and Microelectronic Reliability. He is in the reviewer board of several International Journals such as Thin Solid Film, Microelectronic Reliability, various IEEE Transactions, Reliability Engineering and System Safety etc for more than 5 years. He is the only individual recipient of Ishikawa-Kano Quality Award in Singapore since 2014. He is also current active in providing consultation to multi-national corporations on reliability.
      His research interests include reliability and failure physics modeling of electronic components and systems, finite element modeling of materials degradation, statistical modeling of engineering systems, nano-materials and devices reliability, and prognosis & health management of engineering system.

      For more detail, please visit www.chermingtan.com
    • Hei Wong
       - MOS Devices and Technology
      Hei Wong portrait
      Senior Member
      City University of Hong Kong
      Tat Chee Avenue, Kowloon
      KowloonHong Kong
      Phone 1:
      (852) 3442 7722

      852 2788 7791
      Hei Wong received his B.Sc. degree in electronics from the Chinese University of Hong Kong and Ph.D. in electrical and electronic engineering from the University of Hong Kong. Dr. Wong joined the faculty of the Department of Electronic Engineering at City University of Hong Kong in 1989 and is currently a full professor of the Department. He was a visiting professor of Tokyo Institute of Technology, Japan and a chair professor of Zhejiang University, China.
      Dr. Wong was the chair for the IEEE ED/SSC Hong Kong Joint Chapter during 2002-2003. He is a member of the international steering committees, technical program committees, and organizing committees for many international and local conferences. Dr. Wong has served as editor or guest editor for many journals including Microelectronics Reliability (Elsevier), IEEE Transactions on Electron Devices, IEEE Transactions on Nanotechnology. He served as Regional Editor for IEEE EDS Newsletter during 2003-2009. He has served as a Distinguished Lecturer for IEEE EDS since 2002.
      Dr. Wong has worked on MOS device modeling and characterization, hot-electron effects, low-frequency noise, thin dielectric film physics, IC process modeling and characterization, MOS integrated circuit designs, solid-state sensors. He is author or co-author of four books and over 350 papers including over 170 journal papers and dozen journal review papers. In particular, he is a co-author for the book: Guide to State-of-the-Art Electron Devices which was jointly published by Wiley and IEEE for celebrating the 60th anniversary of the IRE electron devices committee and the 35th anniversary of the IEEE Electron Devices Society. He has presented many invited talks and keynote speeches at numerous international conferences.

      Hei Wong received his B.Sc. degree in electronics from the Chinese University of Hong Kong and Ph.D. in electrical and electronic engineering from the University of Hong Kong. Dr. Wong joined the faculty of the Department of Electronic Engineering at City University of Hong Kong in 1989 and is currently a full professor of the Department. He was a visiting professor of Tokyo Institute of Technology, Japan and a chair professor of Zhejiang University, China.
      Dr. Wong was the chair for the IEEE ED/SSC Hong Kong Joint Chapter during 2002-2003. He is a member of the international steering committees, technical program committees, and organizing committees for many international and local conferences. Dr. Wong has served as editor or guest editor for many journals including Microelectronics Reliability (Elsevier), IEEE Transactions on Electron Devices, IEEE Transactions on Nanotechnology. He served as Regional Editor for IEEE EDS Newsletter during 2003-2009. He has served as a Distinguished Lecturer for IEEE EDS since 2002.
      Dr. Wong has worked on MOS device modeling and characterization, hot-electron effects, low-frequency noise, thin dielectric film physics, IC process modeling and characterization, MOS integrated circuit designs, solid-state sensors. He is author or co-author of four books and over 350 papers including over 170 journal papers and dozen journal review papers. In particular, he is a co-author for the book: Guide to State-of-the-Art Electron Devices which was jointly published by Wiley and IEEE for celebrating the 60th anniversary of the IRE electron devices committee and the 35th anniversary of the IEEE Electron Devices Society. He has presented many invited talks and keynote speeches at numerous international conferences.

      Hei Wong received his B.Sc. degree in electronics from the Chinese University of Hong Kong and Ph.D. in electrical and electronic engineering from the University of Hong Kong. Dr. Wong joined the faculty of the Department of Electronic Engineering at City University of Hong Kong in 1989 and is currently a full professor of the Department. He was a visiting professor of Tokyo Institute of Technology, Japan and a chair professor of Zhejiang University, China.
      Dr. Wong was the chair for the IEEE ED/SSC Hong Kong Joint Chapter during 2002-2003. He is a member of the international steering committees, technical program committees, and organizing committees for many international and local conferences. Dr. Wong has served as editor or guest editor for many journals including Microelectronics Reliability (Elsevier), IEEE Transactions on Electron Devices, IEEE Transactions on Nanotechnology. He served as Regional Editor for IEEE EDS Newsletter during 2003-2009. He has served as a Distinguished Lecturer for IEEE EDS since 2002.
      Dr. Wong has worked on MOS device modeling and characterization, hot-electron effects, low-frequency noise, thin dielectric film physics, IC process modeling and characterization, MOS integrated circuit designs, solid-state sensors. He is author or co-author of four books and over 350 papers including over 170 journal papers and dozen journal review papers. In particular, he is a co-author for the book: Guide to State-of-the-Art Electron Devices which was jointly published by Wiley and IEEE for celebrating the 60th anniversary of the IRE electron devices committee and the 35th anniversary of the IEEE Electron Devices Society. He has presented many invited talks and keynote speeches at numerous international conferences.

      Hei Wong received his B.Sc. degree in electronics from the Chinese University of Hong Kong and Ph.D. in electrical and electronic engineering from the University of Hong Kong. Dr. Wong joined the faculty of the Department of Electronic Engineering at City University of Hong Kong in 1989 and is currently a full professor of the Department. He was a visiting professor of Tokyo Institute of Technology, Japan and a chair professor of Zhejiang University, China.
      Dr. Wong was the chair for the IEEE ED/SSC Hong Kong Joint Chapter during 2002-2003. He is a member of the international steering committees, technical program committees, and organizing committees for many international and local conferences. Dr. Wong has served as editor or guest editor for many journals including Microelectronics Reliability (Elsevier), IEEE Transactions on Electron Devices, IEEE Transactions on Nanotechnology. He served as Regional Editor for IEEE EDS Newsletter during 2003-2009. He has served as a Distinguished Lecturer for IEEE EDS since 2002.
      Dr. Wong has worked on MOS device modeling and characterization, hot-electron effects, low-frequency noise, thin dielectric film physics, IC process modeling and characterization, MOS integrated circuit designs, solid-state sensors. He is author or co-author of four books and over 350 papers including over 170 journal papers and dozen journal review papers. In particular, he is a co-author for the book: Guide to State-of-the-Art Electron Devices which was jointly published by Wiley and IEEE for celebrating the 60th anniversary of the IRE electron devices committee and the 35th anniversary of the IEEE Electron Devices Society. He has presented many invited talks and keynote speeches at numerous international conferences.

    • Xing Zhou
       - Senior Member
      Xing Zhou portrait
      Nanyang Technological University
      School of Electrical and Electronic Eng.
      Block S1, Nanyang Avenue, Office S1-B1c-95
      Singapore 639798
      Phone 1:
      +65 6790 4532

      +65 6793 3318

      Lecture Topics:

      "Unification of MOS Compact Models with the Unified Regional Modeling Approach"

      "Compact Model Application to Statistical Variability and Reliability Studies"

      "A Unified Compact Model for Generic Heterostructure HEMTs"