Publication Representatives

EDS publication representatives serve two-year renewable terms with no voting privileges on the EDS Forum.

  • Exploratory Solid-State Computational Devices and Circuits Steering Committee, Journal on

    • Sayeef Salahuddin
      UC-Berkeley
      Biography: Sayeef Salahuddin is an assistant professor in the department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. His research interests are in the field of electronic transport in small structures currently focusing on novel electronic and spintronic devices for low power logic and memory applications. Salahuddin introduced the concept of using interacting systems for ultra low energy switches, leading to the idea of negative capacitance transistors. He received the Kintarul Haque Gold Medal from Bangladesh University of Engineering and Technology in 2003, a Microelectronics Advanced Research Corporation / Focus Center Research Program Inventor Recognition Award in 2007, a UC Regents Junior Faculty Fellowship in 2009, a Hellman Faculty Fellowship in 2010, the NSF CAREER award in 2011, the IEEE Nanotechnology Early Career Award in 2012, an Air Force Office of Scientific Research Young Investigator Award in 2013, an Army Research Office Young Investigator Award in 2013 and best paper awards from the IEEE Transactions of VLSI Systems in 2013 and at the VLSI-TSA conference, 2013.
  • Applied Superconductivity Editorial Bd., Trans. On

    • Cary Y. Yang
       - Life Fellow
      Santa Clara University
      Center for Nanostructures
      500 El Camino Real
      Santa Clara, CA 95053
      USA
      Phone 1:
      +1 408 554 6814

      Fax:
      +1 408 554 5474
      Lecture Topics: Nanocarbon Interconnects; Metal-Nanocarbon Contacts

      Cary Y. Yang received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Pennsylvania. After working at M.I.T., NASA Ames Research Center, and Stanford University on electronic properties of nanostructure surfaces and interfaces, he founded Surface Analytic Research, a Silicon Valley company focusing on sponsored research projects covering various applications of surfaces and nanostructures. He joined Santa Clara University in 1983 and is currently Professor of Electrical Engineering and Director of TENT Laboratory, a SCU facility located inside NASA Ames. He was the Founding Director of Microelectronics Laboratory and Center for Nanostructures, and served as Chair of Electrical Engineering and Associate Dean of Engineering at Santa Clara. His research spans from silicon-based nanoelectronics to nanostructure interfaces in electronic, biological, and energy-storage systems. An IEEE Life Fellow, he served as Editor of the IEEE Transactions on Electron Devices, President of the IEEE Electron Devices Society, and elected member of the IEEE Board of Directors. He was appointed Vice Chair of the IEEE Awards Board in 2013 and 2014. He received the 2004 IEEE Educational Activities Board Meritorious Achievement Award in Continuing Education "for extensive and innovative contributions to the continuing education of working professionals in the field of micro/nanoelectronics," and the IEEE Electron Devices Society Distinguished Service Award in 2005. From 2008 to 2013, he held the Bao Yugang Chair Professorship at Zhejiang University in China.


  • Device and Materials Reliability Advisory Board, Transactions On

    • Andreas Kerber
      Global Foundries
      2070 Route 52
      Hopewell Junction 12533
      USA
      Phone 1:
      5183057827

      Andreas Kerber was born in Schnann, Austria. He received his Diploma in physics from the University of Innsbruck, Austria, in 2001 and a PhD in electrical engineering from the TU-Darmstadt, Germany in 2004 (granted with honors). He worked as an intern at Bell Laboratories, Lucent Technologies, Murray Hill, NJ, USA (1999-2000), at IMEC in Leuven, Belgium (2001-03) as Infineon Technologies assignee to International SEMATECH, for the Reliability Methodology Department at Infineon Technologies in Munich, Germany (2004-06), for AMD in Yorktown Heights, NY (2006-09), and as a Prinicpal Member of Technical Staff for GLOBALFOUNDRIES in Malta, NY (since 2009). Much of his work centered around Front-End-Of-Line (FEOL) reliability research with focus on metal gate / high-k CMOS technologies. He has co-authored over 100 papers in Journals and Conferences, is an IEEE senior member (since 2011) and an IEEE Distinguished Lecturer for the Electron Device Society (since 2016).
    • Shweta Natarajan
  • Electrochemical and Solid-State Letters Advisory Board

  • Electronic Materials Editorial Oversight Committee, Journal Of

    • Chorng-Ping Chang
    • Quanxi Jia
      Prof. Quanxi Jia is a world-renowned scholar in materials science. He is the Empire Innovation Professor and National Grid Professor of Materials Research in the Department of Materials Design and Innovation (MDI) at the State University of New York at Buffalo. He also serves as scientific director of UB’s New York State Center of Excellence in Materials Informatics (CMI). He is IEEE Fellow elected from IEEE EDS. He has authored or co-authored more than 470 peer-reviewed journal articles, delivered more than 100 invited lectures, and holds 48 U.S. patents. He serves as the co-editor-in-chief of Materials Research Letters, and sits on the editorial board of several academic and professional journals.
      Before joining SUNY Buffalo (UB) as a Professor in 2016, he spent more 20 years at the Los Alamos National Laboratory and served as a Division Director there. He is an elected Fellow of the Los Alamos National Laboratory, Materials Research Society, American Physical Society, American Ceramic Society and American Association for the Advancement of Science. He is an ideal liaison between Electron Devices Society and the Materials community.
  • Lightwave Technology Steering Committee, Journal Of

    • John Dallesasse
       - Associate Professor
      Department of Electrical and Computer Engineering
      University of Illinois at Urbana-Champaign
      2114 Micro and Nanotechnology Laboratory
      208 N. Wright Street
      Urbana, IL 61801
      USA
      Office:
      (217) 333-8416

  • Nanotechnology Magazine

    • Navakanta Bhat
      Indian Institute of Science
      BangaloreIndia
      Brief bio:
      Navakanta Bhat received his Ph.D. in Electrical Engineering from Stanford University, in 1996. Then he worked at Motorola’s Advanced Products R&D Lab in Austin, TX until 1999. He is currently a Professor at the Indian Institute of Science (IISc), Bangalore. His current research is on Nanoelectronics and Sensors. He has more than 200 publications and 20 patents. He was instrumental in creating the National Nanofabrication Centre (NNfC) at IISc, benchmarked against the best university facilities in the world. He is the recipient of IBM Faculty award and Outstanding Research Investigator award (Govt. of India). He is a Fellow of INAE. He was the Editor of IEEE Transactions on Electron Devices, during 2013-2016. He is the member of the National Innovation Council in Nanoelectronics. He is the founder and promoter of a startup called “PathShodh Healthcare”, which builds point-of-care diagnostics for diabetes and its complications.


      Distinguished Lecturer Topics:
      1. Nanotransistors with 2D materials : Opportunities and Challenges

      2. Electrochemical Biosensors for managing Diabetes and its Complications

      3. Single Chip Metal Oxide Gas Sensor Array for Environment Monitoring

      4. Nanostructured High Performance Gas sensors
  • Nanotechnology, Trans. On

    • Navakanta Bhat
      Indian Institute of Science
      BangaloreIndia
      Brief bio:
      Navakanta Bhat received his Ph.D. in Electrical Engineering from Stanford University, in 1996. Then he worked at Motorola’s Advanced Products R&D Lab in Austin, TX until 1999. He is currently a Professor at the Indian Institute of Science (IISc), Bangalore. His current research is on Nanoelectronics and Sensors. He has more than 200 publications and 20 patents. He was instrumental in creating the National Nanofabrication Centre (NNfC) at IISc, benchmarked against the best university facilities in the world. He is the recipient of IBM Faculty award and Outstanding Research Investigator award (Govt. of India). He is a Fellow of INAE. He was the Editor of IEEE Transactions on Electron Devices, during 2013-2016. He is the member of the National Innovation Council in Nanoelectronics. He is the founder and promoter of a startup called “PathShodh Healthcare”, which builds point-of-care diagnostics for diabetes and its complications.


      Distinguished Lecturer Topics:
      1. Nanotransistors with 2D materials : Opportunities and Challenges

      2. Electrochemical Biosensors for managing Diabetes and its Complications

      3. Single Chip Metal Oxide Gas Sensor Array for Environment Monitoring

      4. Nanostructured High Performance Gas sensors
  • Semiconductor Manufacturing Steering Committee, Trans. On

    • Simon Deleonibus
       - Fellow
      Chief Scientist/Directeur Scientifique
      Silicon Technologies
      CEA/LETI, MINATEC
      17 rue des Martyrs
      Grenoble Cedex 38054
      France
      Phone 1:
      +33 438 785973

      Fax:
      33 438 785183
      Simon Deleonibus, retired from CEA-LETI on Jan 1st 2016 as Chief Scientist after 30 years of Research on Micro Nanoelectronics Devices Architectures. Before joining CEA-LETI, he was with Thomson Semiconductors(1981-1986), where he developed and transferred to production advanced microelectronics devices and products. He gained his PhD in Applied Physics from Paris University(1982). He is Visiting Professor at Tokyo Institute of Technology(Tokyo, Japan) since 2014 , National Chiao Tung University(Hsinchu, Taiwan) since 2015 and at Chinese Academy of Science(Beijing, PRC) since 2016 .
      He is distinguished CEA Research Director(2002), IEEE Distinguished Lecturer(2004), Fellow of the IEEE (2006), Fellow of the Electrochemical Society (2015).
      He was awarded the titles of Chevalier de l’Ordre National du Mérite(2004) and Chevalier de l’Ordre des Palmes Académiques(2011), the 2005 Grand Prix de l’Académie des Technologies. He is member of the ITRS since1998, the European Research Council Panel(2007), the Nanosciences Foundation Board of Trustees( 2007).
      He was Associate Editor of IEEE Trans. on Elect. Dev.(2008-2014) and Member of the IEEE Electron Devices Society Board of Governors(01/2009-12/2014) and reelected(2016-2018) ; Chair of IEEE EDS Region 8 SRC (2015-2016) ; Secretary of IEEE Electron Devices Society (2016-2017).

  • Solid-State Circuits Magazine Advisory Board

    • Shuji Ikeda
      Tei Solutions, Co. Ltd.
      NIRC
      16-1 Onogawa
      Tsukuba, Ibaraki 305-8
      Japan
      Phone 1:
      +81 29 849 1276

      Fax:
      +81 29 849 1533

      Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.