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Newsletter Oversight Committee
Newsletter Oversight Committee Chair
Murty Polavarapu
Mail Stop MVA01-016
Newsletter Oversight Committee Members
Giovanni Ghione - Editor-in-Chief
Department of Electronics and Telecommunications, Torino, Italy
Giovanni Ghione graduated cum laude in Electronic Engineering from Politecnico di Torino, Torino Italy in 1981. He was Assistant Professor in Electromagnetic Fields since 1983, Associate Professor in Circuit Theory with Politecnico di Milano, Milano Italy since 1987, and finally Full Professor in Electronics since 1990, first with University of Catania, then again with Politecnico di Torino. His research activity has been mainly concerned with high-frequency electronics and optoelectronics. He has contributed to the physics-based modelling of compound semiconductor devices, with particular interest in the numerical noise modeling in the small- and large-signal regimes, in the thermal modeling of devices and integrated circuits, and in the modeling of widegap semiconductors devices and materials. He has also done research in the field of microwave electronics, with contributions in the modeling of passive elements, in particular coplanar components, and in the design of power MMICs. Prof. Ghione was actively engaged since 1985 in research on optoelectronic devices, with application to the modeling and design of near and far-IR photodetectors, electrooptic and electroabsorption modulators, and GAN-based LEDs. Prof. Ghione has authored or co-authored more than 300 research papers on the above subjects and five books. He is an IEEE Fellow (class 2007). He has been a member of the QPC subcommitee of IEDM in 1997-1998 and in 2006-2007 and Chair in 2008; in 2009-2010 he was the EU Arrangement Co-Chair of IEDM. From 2010 to 2015 he has been chair of the EDS Committee on Compound Semiconductor Devices and Circuits. He has been Chair of the GAAS2003 conference and he has been subcommittee chair in several SCs of the European Microwave Week. He was President of the Library System of Politecnico from 1997 to 2007. From 2007 to 2015 he was the Head of the Department of Electronics and Telecommunications of Politecnico di Torino.
Shuji Ikeda
NIRC
Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.
Benjamin Iniguez - Senior Member
Benjamin Iñiguez obtained the Ph D in Physics in 1992 and 1996, respectively, from the Universitat de les Illes Balears (UIB). From February 1997 to September 1998 he was working as a Postdoctoral Researcher at the Rensselaer Polytecnhnic Institute in Troy (NY, USA). From September 1998 to January 2001 he was working as a Postdoctoral Scientist in the Université catholique de Louvain (Louvain-la-Neuve, Belgium), supported by two Marie Curie Fellowships from the European Commission. In February 2001 he joined the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA)of the Universitat Rovira i Virgili (URV), in Tarragona, Catalonia, Spain) as Titular Professor. In February 2010 he became Full Professor at URV. He obtained the Distinction from the Generalitat for the Promotion of University Research in 2004 and the ICREA Academia Award (the highest award for university professors in Catalonia, from ICREA Institute) in 2009 and 2014, for a period of 5 years each. He led one EU-funded project (“COMON”, 2008-12) devoted to the compact modeling of nanoscale semiconductor devices and he is currently leading one new EU-funded project (DOMINO, 2014-18) targeting the compact modeling of organic and oxide TFTs. His main research interests are the characterization, parameter extraction and compact modelling of emerging semiconductor devices, in particularorganic and oxide Thin-Film Transistors, nanoscale Multi-Gate MOSFETs and GaN HEMTs. He has published more than 150 research papers in international journals and more than 130 abstracts in proceedings of conferences.
Lecture Topics
Compact device modeling
Semiconductor device parameter extraction
Physics of Thin-Film Transistors
Graphene and TMD devices
Arokia Nathan - Fellow
Arokia Nathan is currently a Bye-Fellow and Tutor at Darwin College, University of Cambridge, UK. He received his PhD degree in electrical engineering from the University of Alberta, Canada, in 1988. He joined LSI Logic USA, and subsequently, the Institute of Quantum Electronics, ETH Zürich, Switzerland, before joining the Electrical and Computer Engineering Department at the University of Waterloo, Canada. In 2006, he joined the London Centre for Nanotechnology, University College London, UK, as the Sumitomo Chair of Nanotechnology. He moved to Cambridge University in 2011 as the Chair of Photonic Systems and Displays. He has more than 600 publications, including six books, and more that 110 patents and four spin-off companies. He is the co-founder of Cambridge Touch Technologies, UK and VISBAN Networks UK where he is a Director and Chief Technical Officer. He is a Fellow of IEEE and SID, a Distinguished Lecturer of the IEEE Electron Devices Society and Sensor Council, a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), and winner of the 2020 IEEE EDS JJ Ebers Award.
Lecture Topics
- Flexible Electronics
- Oxide Semiconductor Electronics
- Ultralow Power Transistors and Sensor Interfaces
- Active Matrix OLED Displays
- TFT Compact Modeling and Parameter Extraction
- Nanoscale Large Area Electronics
M.K. Radhakrishnan - Life Senior Member
MK Radhakrishnan (M’82, SM’94, LSM’18) is the Founder Director of NanoRel LLP -Technical Consultants providing analysis-based solutions to micro and nano electronic industries for improving reliability of devices. As a researcher in the area of semiconductor device failure physics for more than 35 years, he worked with industries (ST Microelectronic and Philips), research institutions (Institute of Microelectronics, Singapore and Indian Space Research Organization) and in academia with National University of Singapore. As a technical consultant he works with many MNCs and also provides training on device failure analysis & reliability to various Industries, Universities and Research Centres.
Lecture Topics:
- Circa 70 – Semiconductor Device Progression and Challenges towards Nanoera.
- Interface Physics and Analysis Challenges in Silicon Nanodevices
- Are the Progressions towards the “Benefit of Humanity”? - A Failure Analyst’s View
Ravi M. Todi
Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
Lecuture Topic
- MOS Devices and Technology
Daniel Tomaszewski
D.Tomaszewski (M’2014) received M.Sc degree in electronics (spec. electronic technology) from Warsaw University of Technology in 1980, and Ph.D degree in electrical engineering (spec. solid-state device electronics) from Instytut Technologii Elektronowej, Warsaw in 1998.
Bin Zhao - Fellow
Lecture Topics:
- Analog/Mixed-Signal/RF IC and Enabling Technologies
- High Performance VLSI Interconnect
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