Newsletter Oversight Committee
Newsletter Committee Chair
M.K. Radhakrishnan - Life Senior Member
MK Radhakrishnan (M’82, SM’94, LSM’18) is the Founder Director of NanoRel LLP -Technical Consultants providing analysis-based solutions to micro and nano electronic industries for improving reliability of devices. As a researcher in the area of semiconductor device failure physics for more than 35 years, he worked with industries (ST Microelectronic and Philips), research institutions (Institute of Microelectronics, Singapore and Indian Space Research Organization) and in academia with National University of Singapore. As a technical consultant he works with many MNCs and also provides training on device failure analysis & reliability to various Industries, Universities and Research Centres.
- Circa 70 – Semiconductor Device Progression and Challenges towards Nanoera.
- Interface Physics and Analysis Challenges in Silicon Nanodevices
- Are the Progressions towards the “Benefit of Humanity”? - A Failure Analyst’s View
Newsletter Committee Members
Joachim N. Burghartz - Fellow
Joachim N. Burghartz is an IEEE Fellow, an IEEE Distinguished Lecturer, recipient of the 2014 EDS J.J. Ebers Award, and has been an ExCom member of the IEEE Electron Devices Society. He received his MS degree from RWTH Aachen in 1982 and his PhD degree in 1987 from the University of Stuttgart, both in Germany. From 1987 thru 1998 he was with the IBM T. J. Watson Research Center in Yorktown Heights, New York, where he was engaged in early development of SiGe HBT technology and later in research on integrated passive components, particularly inductors, for application to monolithic RF circuits. From 1998 until 2005 he was with TU Delft in the Netherlands as a full professor and from 2001 as the Scientific Director of the Delft research institute DIMES. In fall 2005 he moved to Stuttgart, Germany, to head the Institute for Microelectronics Stuttgart (IMS CHIPS). In addition, he is affiliated with the University of Stuttgart as a full professor. More recently, he also became CEO of the IMS Mikro-Nano Produkte GmbH. Dr. Burghartz has published about 350 reviewed articles and holds more than 30 patents. Distinguished Lecture Titles -Hybrid Systems in Foil -Ultra-thin chip technology -GaN technologies for power and RF
-Ultra-Thin Chips – A New Paradigm in Silicon Technology
-Hybrid Systems-in-Foil - Combining the Merits of Thin Chips and of Large-Area Electronics
-GaN-on-Si Technology for Power, RF & Specials
-Marvels of Microelectronic Engineering
Meyya Meyyappan - Fellow
Center for Nanotechnology
Nanoscale Vacuum Electronics: Back to the Future?
Printed and Flexible Electronics: Equipment, Processes and Applications
Nanoelectronics Beyond Moore’s Law Era
Nanotechnology: Development of Practical Systems and Nano-Micro-Macro Integration
Meyya Meyyappan is Chief Scientist for Exploration Technology at NASA Ames Research Center in Moffett Field, CA. Until 2006, he served as the Director of the Center for Nanotechnology. He is a founding member of the Interagency Working Group on Nanotechnology (IWGN) established by the Office of Science and Technology Policy (OSTP). The IWGN is responsible for putting together the National Nanotechnology Initiative. He has authored or co-authored over 400 articles in peer-reviewed journals and made over 250 Invited/Keynote/Plenary Talks across the world and over 250 seminars at universities. His research interests include nanoelectronics, carbon nanotubes and various inorganic nanowires, their growth and characterization, and application development in chemical and biosensors, instrumentation, energy storage devices, electronics and optoelectronics.
Dr. Meyyappan is a Fellow of the IEEE, ECS, AVS, MRS, IOP, AIChE, ASME, National Academy of Inventors, and Canadian Academy of Engineering. For his contributions and leadership, he has received numerous awards including: a Presidential Meritorious Award; NASA's Outstanding Leadership Medal; Arthur Flemming Award given by the Arthur Flemming Foundation and the George Washington University; IEEE Judith Resnick Award; IEEE-USA Harry Diamond Award; AIChE Nanoscale Science and Engineering Forum Award; Distinguished Engineering Achievement Award by the Engineers' Council; Pioneer Award in Nanotechnology by the IEEE-NTC; Sir Monty Finniston Award by the Institution of Engineering and Technology (UK); Outstanding Engineering Achievement Merit Award by the Engineers' Council; IEEE-USA Professional Achievement Award; AVS Nanotechnology Recognition Award; IEEE Nuclear and Plasma Sciences Society Merit Award; Distinguished Grumman Project Engineering Award by the Engineers' Council; AVS Plasma Prize; MRS Impact Award. For his sustained contributions to nanotechnology, he was inducted into the Silicon Valley Engineering Council Hall of Fame in 2009. He has received Honorary Doctorate from the University of Witwatersrand, Johannesburg, South Africa and Concordia University, Montreal, Canada. For his educational contributions, he has received: Outstanding Recognition Award from the NASA Office of Education; the Engineer of the Year Award (2004) by the San Francisco Section of the American Institute of Aeronautics and Astronautics (AIAA); IEEE-EDS Education Award; IEEE-EAB (Educational Activities Board) Meritorious Achievement Award in Continuing Education.
Ravi M. Todi
Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
- MOS Devices and Technology
D.Tomaszewski (M’2014) received M.Sc degree in electronics (spec. electronic technology) from Warsaw University of Technology in 1980, and Ph.D degree in electrical engineering (spec. solid-state device electronics) from Instytut Technologii Elektronowej, Warsaw in 1998.
- Electron Device Letters
- Journal of the Electron Devices Society
- Transactions on Electron Devices
- Journal of Microelectromechanical Systems
- Journal of Photovoltaics
- Transactions on Device and Materials Reliability
- Transactions on Semiconductor Manufacturing
- TOC Email Alerts
- EDS Newsletter
- Journal of Electronic Materials
- EDS Guide to State-of-the-Art Electron Devices
- EDS 50th Anniversary Booklet
- IEEE Guidelines for Authors
- IEEE Guidelines on Legitimacy of Authorship
- IEEE Intellectual Property Rights
- Editorials for Authors and Reviewers
- Publication Representatives
- Publication Editors in Chief
- Publications Committee