Editor-in-Chief and Editors
Reha Uzsoy - TSM Editor-in-Chief
Reha Uzsoy is Clifton A. Anderson Distinguished Professor in the Edward P. Fitts Department of Industrial and Systems Engineering at North Carolina State University. He holds BS degrees in Industrial Engineering and Mathematics and an MS in Industrial Engineering from Bogazici University, Istanbul, Turkey. He received his Ph.D in Industrial and Systems Engineering in 1990 from the University of
Florida, and held faculty positions in Industrial Engineering at Purdue University prior to joining North Carolina State University in 2007. His teaching and research interests are in production planning and supply chain management. Before coming to the US he worked as a production engineer with Arcelik AS, a major appliance manufacturer in Istanbul, Turkey. He has also been a visiting researcher at Intel
Corporation and IC Delco. He was named a Fellow of the Institute of Industrial Engineers in 2005, Outstanding Young Industrial Engineer in Education in 1997, and has received awards for both undergraduate and graduate teaching. He is the author of more than 120 refereed journal papers and book chapters, one monograph and three edited books.
T-SM Associate Editors
Jeanne Bickford - Yield Modeling and Analysis and Factory Modeling
Dr. Jeanne Bickford has had a long and wide-ranging career first as a member of IBM’s technical Staff in various scientific and managerial roles, and most recently as a Distinguished Member of the Technical Staff at Globalfoundries. Her experience spans the range of manufacturing, product design, new product introduction and device design. She has authored/co-authored 30 conference/journal papers in the area of design for manufacturing and has 87 issued US patents, one issued China patent, and one issued Japan patent. Dr. Bickford has also served as a guest associate editor for these Transactions for the last 2 years, managing papers associated with the annual ASMC Conference. Her extensive experience will allow her to contribute in the areas of Yield Modeling and Analysis and Factory Modeling.
Martin Braun - Advance Process Control
CPLG, Arizona, USA
Martin W. Braun is a Technologist in Intel Corporation’s Technology Development Analytics and Technology Automation department. Since joining Intel in 2004, Martin has delivered innovative algorithmic solutions for run-to-run control, image analysis, fault detection and classification, mid-range planning, and supply chain management. These have been applied in various manufacturing areas to include wafer fabrication, assembly/test operations, substrate fabrication, and interfactory material transport. Prior to joining Intel, Martin was a Technologist at Texas Instrument’s Kilby Center from 2001-2004, developing run-to-run control and fault detection algorithms for the wafer lithography and etch processes. Martin has published over 40 papers/articles in various conferences and journals, and cowrote two book chapters. He received his MSE and PhD (2001) degrees from Arizona State University.
Dragan Djurdjanovic - Advanced Process Control, Condition based monitoring and maintenance, Operational Decision Making, Lithography Process Control
Dragan Djurdjanovic obtained his B.S. in Mechanical Eng. and in Applied Mathematics in 1997 from the Univ. of Nis, Serbia, his M.S. in Mechanical Eng. from the Nanyang Technological Univ., Singapore in 1999, and his M.S. in Electrical Eng. (Systems) and Ph.D. in Mechanical Eng. in 2002 from the Univ. of Michigan, Ann Arbor. His research interests include advanced quality and process control in multistage manufacturing systems, intelligent proactive maintenance techniques and applications of advanced signal processing in biomedical engineering. He was the director of the recently graduated NSF Industry-University Cooperative Research Center (I-UCRC) on Intelligent Maintenance Systems at The University of Texas at Austin and is Associate Director of the NSF Engineering Research Center on Nanomanufacturing Systems (NASCENT Center). He co-authored 70 journal publications, 9 book chapters and more than 30 refereed conference publications. He is a Fellow of the International Society for Engineering Asset Management, Associate Member of the International Academy for Production Research (CIRP) and is the recipient of several prizes and recognitions, including the 2018 August-Wilhelm Scheer Visiting Professorship from Technical University of Munich, 2006 Outstanding Young Manufacturing Engineer Award from the Society of Manufacturing Engineers (SME) and 2005 Teaching Incentive Award from the Department of Mechanical Engineering of the University of Michigan.
Mircea Dusa - Advanced Processing
Mircea V. Dusa is an ASML Fellow and a founding member of ASML’s Technology Development Center. He has over 40 years of experience in semiconductor industry encompassing manufacturing, development and research, starting from mask making to stepper and metrology engineering. Currently, he works on exploratory imaging solutions for advanced lithography tools seeking integration of exposure tools functionality to non-lithography tool components, from layout design, to photomask, patterning processes and associated metrology and control techniques. Prior to ASML, he was in various engineering positions at National Semiconductor/Fairchild Research Center, SEEQ Technology, ST Microelectronics, Zygo Corporation. He has over 200 publications and holds two dozen US patents in lithography and metrology sciences on topics ranging from DTCO, imaging, overlay and CD control and patterning processes. He is an active member of SPIE, where he chaired the Advanced Lithography Symposium between 2013-2016, Optical Microlithography Conference between 2008-2011 and International Working Group for Photolithography. From 2008 to today, Mircea is teaching SPIE’s special course on Multi Patterning Principles and Applications. He is a member of IEEE and a SPIE Fellow. Dr. Dusa graduated with a BS in Electrical Engineering, MS in Solid State Physics from University of Bucharest in Romania and holds a Ph.D. degree in Applied Optics from the same university.
Soichi Inoue - Photolithography
Lithography Process Technology Department,
Biography: Soichi Inoue joined Toshiba Corporation in 1987, and has been engaged in the research and development of many lithography technologies for over 25 years. He is currently the General Manager at EUVL Infrastructure Development Center, Inc. (EIDEC) on assignment from Toshiba in April 2011. He returned to Toshiba and was promoted to the Senior Manager of Lithography Process Technology Department in Apr. 2015.
His first research in Toshiba was the development of soft X-ray microscopy to investigate the key technologies on the image formation with mirror optics in the vacuum environment. Then he has been engaged in the development of optical lithography. His specific area of expertizes is overall lithography technologies including lithography integration, scanner technology, advanced mask technology, resolution enhancement technology, process monitor technology, OPC, DFM, lithography modeling and numerical computing of lithographic imaging. His current research interest is overall Next Generation Lithography including EUV lithography, Nano-inprint, DSA technologies. He has published more than 100 papers in technical journals and conferences, and has been awarded 90 patents. He won the Semi Technology Symposium Award for double patterning technology in 2008.
He received his B.S. in Mechanical Engineering Science, and M.S. in Information Processing from Tokyo Institute of Technology in 1985 and 1987, respectively. He enrolled in a doctoral program at Tokyo Institute of Technology in 2010 and received his doctoral degree in Sept., 2011.
Feng Ju - Factory Modeling and Automation
Dongchan Kim - Advanced Processing
Chia-Yen Lee - Yield Modeling, Analysis
Jun Haeng Lee - Machine Learning & Artificial Intelligence
Dr. Jun Haeng Lee received his B.S., M.S., and Ph.D. degrees in electrical engineering from Korea Advanced Institute of Science and Technology (KAIST) in 1999, 2001, and 2005, respectively. He worked for 2 and half years at KDDI R&D Labs from 2005. Since he joined Samsung Electronics in 2009, he has been working on various R&D projects including neuromorphic sensors and chips, motion recognition, spiking neural network and its learning algorithms, efficient deep network for neural processors, deep learning algorithms for industrial applications. He worked as a visiting researcher at the Institute of Neuroinformatics, the University of Zurich and ETH Zurich, from 2015 to 2017. He is currently a VP of Technology and the head of Machine Learning Tech Unit at Samsung Advanced Institute of Technology (SAIT) of Samsung Electronics. His activities include developing machine learning and deep learning algorithms for semiconductor manufacturing and leading related projects.
Lars Moench - Factory Modeling and Automation
Lars Mönch is a Full Professor in the Department of Mathematics and Computer Science at the University of Hagen, Germany. He received a master’s degree in applied mathematics and a Ph.D. in the same subject from the University of Göttingen, Germany. He also holds a habilitation degree in information systems from the Technical University of Ilmenau. His current research interests are in simulation-based production control of semiconductor wafer fabrication facilities, applied optimization and artificial intelligence applications in manufacturing, logistics, and service operations. He is a member of GI (German Chapter of the ACM), GOR (German Operations Research Society), SCS, and INFORMS. Prof. Mönch served as an Associate Editor for IEEE Transactions on Automation Science and Engineering from 2008-2012.
Mahadeva Iyer Natarajan - Yield Modeling and Analysis and Yield Enhancement
Dr. Mahadeva Iyer Natarajan is currently Director of Product Development Quality and Reliability at Allegro Microsystems, and has held technical and management positions at Globalfoundries (USA), Chartered Semiconductor (Singapore), Silterra (Malaysia), IMEC (Belgium) and IME (Singapore). His experience and interests span the range of supporting product reliability issues across product design, manufacturing and customer support. He is the author of more than 90 technical publications and holds 40 patents, and will support us in the areas of Yield Modeling and Analysis and Yield Enhancement.
Gian Antonio Susto - Factory & Process Modeling
Gian Antonio Susto (S'11-M'16) received the M.S. degree (cum laude) in control systems engineering and the Ph.D. in Information Engineering from the University of Padova, Padova, Italy, in 2009 and 2013. He is currently Assistant Professor at University of Padova. He is also a co-founder at Statwolf Ltd. He has been a visiting student at the University of California, San Diego (2008-09), and at National University of Ireland Maynooth (NUIM) (2012), an Intern Researcher at Infineon Technologies Austria AG, Villach, Austria (2011) and post-doctoral associate at NUIM (2013). During his career, his awards include the IEEE-CASE Best Student Conference Paper Award (2011), IEEE/SEMI-ASMC Best Student Paper Award (2012) and IEEE-MSC Best Student Paper Award (2012). His research interests include manufacturing data analytics, machine learning, gesture recognition and natural language processing. He is the author of more than 40 technical publications, and his knowledge of data science and analytics will significantly enhance our Factory Modeling area.
- Publications Committee
- Publication Representatives
- EDS 50th Anniversary Booklet
- IEEE Guidelines for Authors
- Editorials for Authors and Reviewers
- EDS Newsletter
- IEEE Electron Devices Magazine
- Journal of Photovoltaics
- Transactions on Device and Materials Reliability
- Transactions on Semiconductor Manufacturing
- Journal on Flexible Electronics
- Journal of Lightwave Technology
- Transactions on Materials for Electron Devices
- Open Journal on Immersive Displays
- Electron Device Letters
- Journal of the Electron Devices Society
- Transactions on Electron Devices
- Journal of Microelectromechanical Systems
- Journal on Exploratory Solid-State Computational Devices and Circuits
- Journal of Electronic Materials
- 75th Anniversary of the Transistor Book