VLSI Technology and Circuits Committee Overview

Objective The objective of the VLSI Technology and Circuits Committee is to identify new/hot areas of interest to the Electron Devices and Solid-State Circuits communities. Based on the nature of the areas, we will recommend any or all of the following:
  1. Initiate topical workshops of current interest (attached to existing conferences or start new ones)
  2. Special Issues for major publications (e.g., T-ED)
  3. Panel session topics for major conferences
  4. Special Sessions for major conferences
Membership This is a non-voting Ex-Officio Forum member position with a two-year renewable term. We expect to limit the membership of the committee to no more than two terms so that new ideas can be generated, incorporated, and executed.
Operation This committee operates entirely by email. There are two Society BoG meetings a year, with one meeting always being held in conjunction with IEDM. The other BoG meeting is normally held sometime in the April-June time period in conjunction with another EDS sponsored conference.
History The VLSI Technology and Circuits Technical Committee was formed in 1998 under the leadership of Prof. Charles G. Sodini (MIT), followed by Dr. H.-S. Philip Wong (IBM), Werner Weber (Infineon), Dr. James A. Hutchby (SRC) and Dr. Bin Zhao (Freescale Semiconductor). Since its formation, the VLSI Committee has chartered its missions to identify new technical trends, to help foster new technical concepts, and to serve the emerging needs of the Electron Devices and Solid-State Circuits communities in VLSI. The committee members include many well recognized technical experts representing a very wide spectrum of technical expertise in VLSI devices, technology, and circuits. Every year, the committee brainstorms (by email) on ideas that are suitable for a new workshop, special issue for a journal, panel sessions, and special sessions for conferences. Committee members then take these ideas forward and find a way to make them happen, either by being the organizers themselves, or by finding suitable organizers for the topic. We work closely together with journal editors and conference organizers. Especially in the case of new workshops, it is much easier to attach the new workshop to existing conferences rather than to start new.
Contact If you have ideas for a new workshop, a special issue for journals, or topics for panel sessions and special sessions for conferences, please contact current committee members. If you would like to volunteer in the committee or have suggestions and comments to the activities of this committee, please contact Shuji Ikeda.


Kazunari Ishimaru
Toshiba Corporation

Any comments, ideas, and suggestions related to the field of VLSI Technology and Circuits are sincerely welcome!

  • Please click here to view the committee's article from the October 2014 edition of the EDS Newsletter.
  • The EDS VLSI Committee met in December 2014 in conjunction with the EDS Board of Governors meeting series and the International Electron Devices Meeting (IEDM). 
    VLSI Committee Meeting Minutes - December 2014

  • VLSI Technology and Circuits Committee Chair

  • VLSI Technology and Circuits Committee Members

    • Sandeep Bahl
      Texas Instruments
    • Mansun J. Chan
      Hong Kong University of Science and Tech.
      Dept. of Electronic and Computer Eng.
      Clear Water Bay, Kowloon, Hong Kong
      Phone 1:
      +852 2358 8519

      +852 2358 1485
      Email 1:

      Lecture Topics:  1) Nano-device physics and technology 2) Device modelling and circuit simulation 3) Non-volatile memory technology 4) Bio-sensors and circuits MANSUN CHAN received his MS and Ph.D. from the University of California at Berkeley. He is currently a Professor at the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). His main research covers novel silicon device fabrication and modeling. In particular, he is one of the key developers of the BSIM model series that have been selected to be the industrial standard models for conventional and SOI MOSFETs used by the semiconductor industry worldwide. Prof. Chan has served IEEE in various capacities and he is currently a Distinguished Lecturer of IEEE EDS.

      Biography:  Mansun Chan (S’92-M’95-SM’01-F’13) received Ph.D. degrees from the UC, Berkeley in 1995. He is one of the major contributors to the unified BSIM model for SPICE, which has been accepted by most US companies and the Compact Model Council (CMC) as the first industrial standard MOSFET model. In January 1996, he has joined the EEE faculty at Hong Kong University of Science and Technology.  After that, he developed a SOI MOSFET model, which has been adopted by UC Berkeley as the core of the BSIMSOI model.  Between July 2001 and December 2002, he was a Visiting Professor at University of California at Berkeley and the Co-director of the BSIM program.  In this capacity, he has successfully completed the technology transfer of BSIM3SOI to be the first industrial standard SOI MOSFET model.  In addition to device modeling, Prof. Chan’s current research interests also include nano-transistor fabrication technology, carbon-based device physics, printable transistors, 3D integrated circuits, bio-sensors and cloud computing based simulation platform.  He is current working on an interactive modeling and online simulation (i-MOS) platform to facilitate the interactions between model developers and circuit designers using the Internet technology.

      Prof. Chan is a recipient of the UC Regents Fellowship, Golden Keys Scholarship for Academic Excellence, SRC Inventor Recognition Award, Rockwell Research Fellowship, R&D 100 award (for the BSIM3v3 project), Teaching Excellence Appreciation award, Distinguished Teaching Award and the Shenzhen City Technology Innovation Award by the Chinese Government. He is a Fellow and Distinguished Lecturer of IEEE.

    • Coming Chen
    • Shuji Ikeda
      Tei Solutions, Co. Ltd.
      16-1 Onogawa
      Tsukuba, Ibaraki 305-8
      Phone 1:
      +81 29 849 1276

      +81 29 849 1533

      Shuji Ikeda (M’91-SM’02-F’04) received the B.S. degree in Physics, PhD. in Electrical Engineering from Tokyo Institute of Technology, Tokyo, Japan in 1978 and 2003 respectively and the M.S. degree in Electrical Engineering from Princeton University, Princeton, New Jersey, USA in 1987. He joined Semiconductor and Integrated Circuit Group, Hitachi ltd., Tokyo, Japan in 1978, where he was engaged in research and development of state of the art SRAM process and devices. He was also working on developing process technology for LOGIC, embedded memories, and CMOS power RF devices and on transferring technology to mass production line. He invented some of the outstanding structures for SRAM. He pioneered process to implement new materials in mass production, including W-polycide, Al-Cu-Si in 1984 and in-situ phosphorus-doped-polysilicon in 1990. He is the first to realize Lightly Doped Drain (LDD) in production to suppress Hot Carrier Injection in 1984. He also firstly implemented polyimide coat of the chip to immune SER caused by alpha particle from the resin covers the chip. In October 2000, he joined Trecenti Technologies Inc. He developed new process scheme with aggressive reduction of process time and suitable for single-wafer processing. That achieved less than 0.25days/layer cycle time. In April 2005, he joined ATDF at Austin Texas, as a Director of Technology. Where he develops various kinds of technologies includes scaled CMOS, non-classical CMOS, new materials and tools. He established tei Technology LLC in May 2008, Omni Water Solutions LLC, in 2009 at Austin Texas. He started tei Solutions Inc in Tsukuba, Ibaraki, Japan in 2010, where, he manages R&D foundry developing new devices, process technologies for VLSIs. He also integrates emerging technology onto semiconductor manufacturing technology to create innovative products/businesses. Due to his contributions to 200 MHz RISC microprocessor, he got 1999 R&D 100 Award. He served as subcommittee and executive committee member of IEDM from 1993 to 2002. He introduced Manufacturing Session in 1998 and chaired IEDM in 2002. He was a member of EDS Administrative Committee from 2005 to 2010. He was a technical program member for VLSI Technology Symposium in 2007 and 2008. He serves as a chairman of VLSI committee of EDS from 2009 and AdHoc Committee on Asia EDS Conference from 2014.

    • Pei-Wen Li
      ED617, Department of Electronics Engineering, National Chiao Tung
      University, 1001 University Road,
      Hsinchu 300Taiwan
      Phone 1:

      Lecture Titles
      1.Designer Ge quantum-dot phototransistors for highly-integrated,
      broadband optical interconnects
      2.Germanium quantum dots for functional charge sensing/metrology
      3.The Unique Optoelectronic and Energy-Conversion Devices based on
      Ge/Si/O Interactions
    • D Nirmal
      Electronics and Communication Engineering
      Karunya Institute of Technology & Sciences
      Tamilnadu 64114
      D NIRMAL received the B.E. degree in Electrical and Electronics from Anna University, Chennai, India in 2005, and the M.E. degree in VLSI Design from Karunya University and Ph.D. degree in Information and communication from Anna University, Chennai, India in 2012. He is currently an Associate professor of Electronics and communication engineering at Karunya Institute of technology and sciences, Coimbatore, India.

      His research interest includes Nano devices, GaN HEMT, VLSI Design, Optoelectronics and Device fabrication. He has published several papers in Journal and conferences.

      Among his honours, he is a recipient of Shir.P.K.Das Memorial Best Faculty Award in the Year 2013 and Intuition of Engineers Young Engineering Award in 2017. Best researcher award from karunya University in the year 2014.
      He is Editor of Microelectronics Journal and International journal of Electronics and communication Engineering of Elsevier publisher form 2014 and 2016 respectively.
      He is also currently working in funded project from Defense Research and Development organization, Government of India and Tamil Nadu state Council for science and technology, India.
      He is currently a Chair of IEEE ED Coimbatore Chapter . He is a Senior member of IEEE, Member of IETE, SSI , ISTE and VSI Societies.

    • John Suehle
    • Hitoshi Wakabayashi
      ​Tokyo Institute of Technology
    • Shimeng Yu
       - Assistant Professor of Electrical Engineering
      Arizona State University
      781 E Terrace Rd
      ISTB4 room 591
      Tempe, AZ 85287
      Shimeng Yu received the B.S. degree in microelectronics from Peking University, Beijing, China in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University, Stanford, CA, USA in 2011, and in 2013, respectively. He is currently an assistant professor of electrical engineering and computer engineering at Arizona State University, Tempe, AZ, USA.

      His research interests are emerging nano-devices and circuits with a focus on the resistive memories for different applications including machine/deep learning, neuromorphic computing, monolithic 3D integration, hardware security, radiation-hard electronics, etc. He has published >60 journal papers and >100 conference papers with citations >5500 and H-index 34.

      Among his honors, he is a recipient of the Stanford Graduate Fellowship from 2009 to 2012, the IEEE Electron Devices Society Masters Student Fellowship in 2010, the IEEE Electron Devices Society PhD Student Fellowship in 2012, the DOD-DTRA Young Investigator Award in 2015, the NSF Faculty Early CAREER Award in 2016, and the ASU Fulton Outstanding Assistant Professor in 2017, and the IEEE Electron Devices Society Early Career Award in 2017.

      He did summer internship in IMEC, Belgium in 2011, and IBM TJ Watson Research Center in 2012. He held visiting faculty position in Air Force Research Laboratory in 2016. He served the Technical Program Committee for IEEE International Symposium on Circuits and Systems (ISCAS) 2015-2017, ACM/IEEE Design Automation Conference (DAC) 2017-2018, and IEEE International Electron Devices Meeting (IEDM) 2017-2018, etc.
    • Monuko du Plessis
      ​University of Pretoria
      South Africa