Semiconductor Manufacturing
The committee was founded to chart future directions for the Electron Devices Society in the field of semiconductor manufacturing. Transactions on Semiconductor Manufacturing, a joint publication of the IEEE Components, Packaging and Manufacturing Technology Society, the IEEE Electron Devices Society, the IEEE Reliability Society and the IEEE Solid-State Circuits Society, has long featured papers on Semiconductor Manufacturing. It is the purpose of this committee to consider new ways to encourage and highlight this important field in the Electron Devices Society and the IEEE.
Semiconductor Manufacturing Committee Chair
Semiconductor Manufacturing Committee Members
I am an Engineering Leader with 15 years experience in Product & Test Engineering of semiconductor chips on advanced silicon and packaging technologies.
I graduated with a Master's degree in Electrical Engineering from Purdue University, IN following which I started my professional career at Intel working on TCAD modeling on the first FinFet node. After 7 years at Intel, I joined the Apple Silicon Engineering team as a Product Engineer to ship millions of "A" series iPhone and iPad chips. Subsequently, I joined Google Custom Silicon to productize their first generation in-house developed Tensor chip. I led and managed the PTE team in the organization.
I am currently a manager at Rivos, an early stage HPC startup, and leading the product and test engineering function.
Xiuling Li received her B.S. degree from Peking University and Ph.D. degree from the University of California at Los Angeles. Following post-doctoral positions at California Institute of Technology and University of Illinois, as well as industry experience at II-VI, Inc. (formerly EpiWorks, Inc.), she joined the faculty of the University of Illinois, Urbana-Champaign (UIUC) in 2007. At UIUC, she was the Donald Biggar Willett Professor in Engineering and the interim director of the Nick Holonyak Jr. Micro and Nanotechnology Laboratory. She joined the faculty of the University of Texas at Austin in Aug. 2021. She holds the Temple Foundation Endowed Professorship in Department of Electrical and Computer Engineering. She also has an affiliate appointment in Chemistry as the Fellow of the Dow Professorship. Her research focuses on semiconductor materials and devices. She has published >170 journal papers and holds >20+ patents, delivered > 140 invited lectures worldwide. She has been honored with the NSF CAREER award, DARPA Young Faculty Award, and ONR Young Investigator Award, and the IEEE Pioneer Award in Nanotechnology. She is a Fellow of the IEEE, the American Physics Society (APS), the Optical Society (Optica, formerly OSA), the National Academy of Inventors (NAI), and the American Association for the Advancement of Science (AAAS). Among her professional society service activities, she served as a member of the board of governors and VP of Finance and Administration of IEEE Photonics Society and the fellow evaluation committee of IEEE Electron Device Society, IEEE Andrew Grove award committee, IEEE Nanotechnology Council Fellow Search Committee, and the executive committee of APS Division of Materials Physics. She has been a Deputy Editor of Applied Physics Letters since 2015.
Dr Oliver Patterson is a senior engineer with Intel Logic Technology Development and a well-respected expert in e-beam inspection for semiconductor development with over 80 publications and 25 patents in this and related areas. He has a special passion for voltage contrast inspection and test structure design. Previously, Oliver served as Principal Technologist for the HMI division of ASML where his responsibilities included developing solutions for gap defects for customers and product management for a range of inspection products including Multi-Beam Inspection. Prior to this, he was the lead e-beam engineer at GLOBALFOUNDRIES and IBM, where due to his leadership and innovation, e-beam inspection evolved to play a pivotal role in semiconductor development. He began his career in the semiconductor industry as part of Bell Labs with Lucent Technologies. Oliver has worked on a wide range of semiconductor technologies including SOI, FDSOI and bulk logic, DRAM and 3d NAND spanning from 250nm to the most recent nodes.
Professionally, Dr. Patterson is a long-time member of the Steering Committee of ASMC and was the conference Co-Chairman for ASMC 2014. He has served as a Guest Editor for the IEEE Transactions on Semiconductor Manufacturing many times from 2006 to the present, and is currently a Senior Member of IEEE. Oliver received his S.B. from the Massachusetts Institute of Technology, his M.S. from the University of Wisconsin and his Ph.D. from the University of Wisconsin all and Electrical Engineering and Computer Science.
