Paul Rappaport Award
The Paul Rappaport Award was established in 1984 to recognize the best paper appearing in a fast turn around archival publication of the IEEE Electron Devices Society, targeted to the IEEE Transactions on Electron Devices. It is presented annually and the recipient(s) is awarded a certificate and a check for $2,500, presented at the IEEE EDS International Electron Devices Meeting.
Congratulations to the 2022 IEEE EDS Paul Rappaport Award Winners for the winning paper
"InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With fMAX = 1.2 THz”
Award Winners
| Year | Individuals | Paper |
|---|---|---|
| 2022 | Akshay M. Arabhavi, Filippo Ciabattini, Sara Hamzeloui, Ralf Flückiger, Tamara Saranovac, Daxin Han, Diego Marti, Giorgio Bonomo, Rimjhim Chaudhary, Olivier Ostinelli, and Colombo R. Bolognesi | InP/GaAsSb Double Heterojunction Bipolar Transistor Emitter-Fin Technology With fMAX = 1.2 THz |
| 2021 | Jixuan Wu, Fei Mo, Takuya Saraya, Toshiro Hiramoto, Mototaka Ochi, Hiroshi Goto and Masaharu Kobayashi | Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled by Sn-Doped InGaZnO for 3-D Embedded RAM Application |
| 2020 | Kangguo Cheng, Chanro Park, Heng Wu, Juntao Li, Son Nguyen, Jingyun Zhang, Miaomiao Wang, Sanjay Mehta, Zuoguang Liu, Richard Conti, Nicholas J. Loubet, Julien Frougier, Andrew Greene, Tenko Yamashita, Balasubramanian Haran and Rama Divakaruni | Improved Air Spacer for Highly Scaled CMOS Technology |
| 2019 |
|
Enhanced Reliability of 7nm Process Technology Featuring EUV |
| 2018 |
Konstantin Osipov, Joachim Wuerfl, Ina Ostermay, Frank Brunner, Günther Tränkle and Maniteja Bodduluri
|
Local 2DEG Density Control in Heterostructures of Piezoelectric Materials and Its Application in GaN HEMT Fabrication Technology |
| 2017 | L. Witters, H. Arimura, F. Sebaai, A. Hikavyy, A. P. Milenin, R. Loo, A. De Keersgieter, G. Eneman, T. Schram, K. Wostyn, K. Devriendt, A. Schulze, R. Lieten, S. Bilodeau, E. Cooper, P. Storck, E. Chiu, C. Vrancken, P. Favia, E. Vancoille, J. Mitard, R. Langer, A. Opdebeeck, F. Holsteyns, N. Waldron, K. Barla, V. De Heyn, D. Mocuta, and N. Collaert | Strained Germanium Gate-All-Around pMOS Device Demonstration Using Selective Wire Release Etch Prior to Replacement Metal Gate Deposition |
| 2016 |
Takatoshi Tsujimura |
A Color-Tunable Polychromatic Organic-Light-Emitting-Diode Device With Low Resistive Intermediate Electrode for Rollto-Roll Manufacturing |
| 2015 |
Stefano Ambrogio |
Noise-Induced Resistance Broadening in Resistive Switching Memory Part I: Intrinsic Cell Behavior / Part II: Array Statistics |
| 2014 | Sylvain Barraud Jean-Michel Hartmann Virginie Maffini-Alvaro Lucie Tosti Vincent Delaye Dominique Lafond |
"Top-Down Fabrication of Epitaxial SiGe/Si Multi-(Core/Shell) p-FET Nanowire Transistors |
| 2013 |
Rui Zhang |
High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using HfO2/Al2O3/GeOx/Ge Gate Stacks Fabricated by Plasma Postoxidation |
| 2012 | Kelin Kuhn | Considerations for Ultimate CMOS Scaling |
| 2011 | Tibor Grasser Ben Kaczer Wolfgang Goes Hans Reisinger Thomas Aichinger Philipp Hehenberger Paul-Jürgen Wagner Franz Schanovsky Jacopo Franco MarÃa Toledano Luque Michael Nelhiebel |
The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction-Diffusion to Switching Oxide Traps |
| 2010 | Yusaku Kato Tsuyoshi Sekitani Yoshiaki Noguchi Tomoyuki Yokota Makoto Takamiya Takayasu Sakurai Takao Someya |
Large-Area Flexible Ultrasonic Imaging System With an Organic-Transistor Active Matrix |
| 2009 | Takao Someya Tsuyoshi Sekitani Koichiro Zaitsu Yoshiaki Noguchi Kiyoshiro Ishibe Makoto Takamiya Takayasu Sakurai |
Printed Nonvolatile Memory for a Sheet-Type Communication System |
| 2008 | Kah-Wee Ang Jian Qiang Lin Ganesh S. Samudra Shih-Hang Tung Narayanan Balasumbramanian Yee-Chia Yeo |
Strained n-MOSFET With Embedded Source/Drain Stressors and Strain-Transfer Structure (STS) for Enhanced Transistor Performance |
| 2007 | Azad Naeemi James D. Meindl |
Design and Performance Modeling for Single-Walled Carbon Nanotubes as Local, Semiglobal, and Global Interconnects in Gigascale Integrated Systems |
| 2006 | Billy Lau Alfred Forchel Lukas Worschech David Hartmann |
Cascaded Quantum Wires and Integrated Design for Complex Logic Functions: Nanoelectronic Full Adder |
| 2005 | Kailash Gopalakrishnan Peter B. Griffin James D. Plummer Raymond Wood Christoph Jungemann |
Impact Ionization MOS (I-MOS) - Part I: Device and Circuit Simulations and Part II: Experimental Results |
| 2004 | Franco Stellari Peilin Song James C. Tsang Moyra K. McManus Mark B. Ketchen |
Testing and Diagnostics of CMOS Circuits Using Light Emission from Off-State Leakage Current |
| 2003 | Ken Uchida Junji Koga Ryuji Ohba Akira Toriumi |
Programmable Single - Electron Transistor Logic for future Low-Power Intelligent LSI : Proposal and Room - Temperature Operation |
| 2002 | Yee Chia Yeo Vivek Subramanian Jakub Kedzierski Peiqi Xuan Tsu-Jae King Jeffrey Bokor Chenming Hu |
"Design & Fabrication of 50-nm Thin-Body p-MOSFETS with a Silicon-Germanium Heterostructure Channel" |
| 2001 | Ioannis Kymissis Christos D. Dimitrakopoulos Sampath Purusothaman Raymond M. Warner, Jr. |
High Performance Bottom Electrode Organic Thin-Film Transistors, which appeared in the June 2001 issue of T-ED. |
| Microelectronics: Its Unusual Origin and Personality, which appeared in the November 2001 issue of T-ED. | ||
| 2000 | Didier Dutartre Malgorzata Jurczak Damien Lenoble Jose Martins Stephanie Monfray Roland Pantel M. Paoli Jorge Luis Regolini Pascal Ribot Thomas Skotnicki Beatrice Tormen |
Silicon-on-Nothing (SON)--an Innovative Process for Advanced CMOS, which appeared in the November, 2000 issue of Transactions on Electron Devices. |
| 1999 | Pallab Bhattacharya Kishore K. Kamath Jasprit Singh David Klotzkin Jamie Phillips Hong-Tao Jiang Nalini Chervela Theodore B. Norris Tom Sosnowski Joy Laskar M. Ramana Murty |
In (Ga)As/GaAs Self-Organized Quantum Dot Lasers: DC and Small-Signal Modulation Properties |
| 1998 | Yujun Li Tso-Ping Mai |
A Front-Gate Charge-Pumping Method for Probing Both Interfaces in SOI Devices |
| 1997 | Dimitri A. Antoniadis Anantha P. Chandrakasan Carlin J. Vieri Isabel Y. Yang |
Back-Gated CMOS on SOIAS For Dynamic Threshold Voltage Control |
| 1996 | Chris J. Diorio Paul E. Hasler Carver A. Mead Bradley A. Minch |
A Single-Transistor Silicon Synapse T-ED/ED-43/11 |
| 1995 | Herbert Lifka Ger M. Paulzen Henk G. Pomp Pierre H. Woerlee Reinout Woltjer |
Three Hot-Carrier Degradation Mechanisms in Deep-Submicron PMOSFETS T-ED/ED-42/1 |
| 1994 | Takashi Hashimoto Tomoyuki Ishii Takashi Kobayashi Fumio Murai Koichi Seki Kazuo Yano |
Room-Temperature Single-Electron Memory T-ED/ED-41/9 |
| 1993 | Hisashi Hara Hiroshi Iwai Toyota Morimoto Masakatsu Tsuchiaki |
A New Charge Pumping Method for Determining the Spatial Distribution of Hot-Carrier- Induced Fixed Charge in p- MOSFETS's T-ED/ED-40/10 |
| 1992 | April S. Brown Linda M. Jelloian Loi D. Nguyen Mark A. Thompson |
50-nm Self-Aligned Gate Pseudomorphic AllnAs/GalnAs High Electron Mobility Transistors T-ED/ED-39/9 |
| 1991 | Hiroshi Fukuda Akira Imai Shinji Okazaki Tsuneo Terasawa |
New Approach to Resolution Limit and Advanced Image Formation Techniques in Optical Lithography T-ED/ED-38/1 |
| 1990 | Khalil Najafi Kenichiro Suzuki Kensall D. Wise |
A 1024-Element High-Performance Silicon Tactile Imager T-ED/ED-37/8 |
| 1989 | James F. Gibbons Judy L. Hoyt Clifford A. King |
Bandgap and Transport Properties of Si1-xGex by Analysis of Nearly Ideal Si/Si1-xGex/Si Heterojunction Bipolar Transistors T-ED/ED-36/10 |
| 1988 | Diane R. Ahrendt Yeou-Chong Vladimir F. Drobny Valdis E. Garuts Robert D. Herman Eric E. Lane June S. Lee Evan E. Patton Tadanori Yamaguchi Simon Yu Todd H. Yuzuriha |
Process and Device Performance of a High-Speed Double Poly-Si Bipolar Technology Using Process Borosenic-Poly with Coupling-Base Implant T-ED/ED-35/8 |
| 1987 | Richard B. True | Emittance and the Design of Beam Formation, Transport, and Collection Systems in Periodically Focused TWT's T-ED/ED-34/2 |
| 1986 | Ben T. Ebihara Peter Ramins |
Improvements in the MDC and TWT Overall Efficiency Through the Application of Carbon Surfaces Electrode T-ED/ED-33/11 |
| 1985 | Roger Epworth Linus A. Fetter Richard E. Howard Lawrence D. Jackel Paul M. Mankiewich Kristan S. Ralls William J. Skocpol Donald M. Tennant |
Single Electron Switching Events in MOSFET's Nanometer-Scale Si, T-ED/ED- 32/ |
| 1984 | Shojiro Asai Norikazu Hashimoto Kiyoo Itoh Tokuo Kure Hideo Sunami Toru Toyabe |
A Corrugated Capacitor Cell (CCC) T-ED/ED- 31/6 |
| 1983 | Jaroslav Hynecek | Electron-Hole Recombination Antiblooming for Virtual-Phase CCD Imager T-ED/ED-30/8 |
| *1982 | R. Fabian Pease David B. Tuckerman |
High-Performance Heat Sinking for VLSI EDL/ED-2/5 |
*Selected by EDS BoG as first Paul Rappaport Award winner. IEEE did not approve the award until 1983.
Although the IEEE Electron Devices Society (EDS) is pleased to invite all individuals and groups in the OFAC embargoed countries to submit nominations for IEEE EDS Awards, the IEEE EDS cannot provide any award monies to members from such countries at this time.
