Editor-in-Chief and Editors

Dr. Edmundo A. Gutiérrez-D. Got his PhD in 1993 from the Catholic University of Leuven, Belgium with the thesis entitled “Electrical performance of submicron CMOS technologies from 300 K to 4.2 K”. From 1989 to 1993, while working for his PhD, served as a research assistant at the Interuniversity Microelectronics Center (IMEC) in Leuven, Belgium. In 1996 was guest Professor at Simon Fraser University, Vancouver, Canada. In 1996 spent two months as an invited lecturer at the Sao Paulo University, Brazil. In 2000 acted as Design Manager of the Motorola Mexico Center for Semiconductor Technology. In 2002 was invited lecturer at the Technical University of Vienna, Austria. In 2005 joined the Intel Mexico Research Center as technical Director. Currently he holds a Professor position at the National Institute for Astrophysics, Optics and Electronics (INAOE), in Puebla, Mexico. Prof. Gutiérrez-D. is an IEEE senior member since 2008.

Professor Gutiérrez-D. has published over 100 scientific publications and conferences in the field of semiconductor device physics, has supervised 5 M.Sc. and 10 Ph.D. thesis, and is author of the book “Low Temperature Electronics, Physics, Devices, Circuits and Applications” published by Academic Press in 2000. Prof. Gutiérrez-D. is member of the Mexico National System of Researchers and technical reviewer for the Mexico National Council for Science and Technology (CONACyT).

Gennadi Bersuker completed his M.S. and Ph.D. in Physics at the Leningrad State University and Kishinev State University, respectively. After graduation, he joined Moldavian Academy of Sciences, and then worked at Leiden University and the University of Texas at Austin. Since 1994, he has been working at SEMATECH on electrical characterization of Cu/low-k interconnect, high-k gate stacks, advanced memory, and CMOS process development. He has been involved in organizing, chairing, or serving as a committee member in a number of technical conferences, including IRW, IRPS, IEDM, ULSI-TFT, ISAGST, LEC, NGCM, APS. He is a SEMATECH Fellow and has published over 200 papers on the electronic properties of dielectrics and semiconductor processing and reliability.

Isodiana Crupi is Associate Professor at the Department of Engineering at the University of Palermo. She received the M.Sc. degree in Electronic Engineering from the University of Messina in 1999 and the Ph.D. degree in Materials Science from the University of Catania in 2003. From 2004 to 2015 she has been Research Scientist at the National Research Council (CNR-IMM) in Catania. Since 1998, she has been a frequent scientific visitor at IMEC, Leuven (Belgium) collaborating with the CMOS Reliability, FLASH Memory and Solar Cell groups and at the Czech Academy of Sciences, Praha, Czech Rep. Her main research interests include the synthesis and characterization of innovative materials for photovoltaic applications, electrical characterization of advanced semiconductor devices for micro- and optoelectronics and the development of silicon nanocrystals devices for memory applications. Prof. Crupi has authored and coauthored more than 90 papers published on ISI journals and international conference proceedings which have been cited about 1700 times (h-index of 25). She is coinventor of one U.S. Patent, participant of several national and EU research projects and supervisor of several Master and PhD theses. She serves as referee for outstanding international scientific journals and co-organized various symposia at the European Materials Research Society (E-MRS). She is a technical program committee member of the IEEE International Electron Devices Meeting (IEDM) in 2019 and, since 2012, of the European Solid-State Device Conference (ESSDERC). She received the "Young Scientist Award" at the E-MRS (2003) and the "Premio per Dottori di Ricerca" from the Accademia Gioenia (2004).

Dr. Abhisek Dixit is currently an Associate Professor in the Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, INDIA. Other positions he held prior to this include Assistant Professor of Electrical Engineering at IIT Delhi and Advisory Research Engineer at IBM SRDC. Dr. Dixit received his PhD from K. U. Leuven/IMEC BELGIUM in 2007 and MTech from IIT Bombay, INDIA in 2002. He has worked on fabrication, characterization, compact and TCAD modeling of devices and circuits on various 300 and 200-mm technologies, including bulk Si, PD and FD-SOI, BiCMOS. Although his modeling and characterization work spans range of technology nodes all the way from 10-nm up to 0.35-micron, in his early career he focused on SOI- FinFET device-technology integration at 45, 32, 14-nm nodes. His current research interests include CMOS reliability including hot-carrier degradation and radiation hardness, pulsed/RF characterization and modeling of logic devices, and device scaling of SOI, nanowire, nanosheet, and negative capacitance-FETs beyond 7-nm nodes. Dr. Dixit has more than 60 publications and 4 patents in FinFET and related technologies and he is a senior member of IEEE since 2013.

 

Lecture Topics:

- CMOS logic device scaling 

- Negative Capacitance FETs

- Gamma and Heavy Ion Irradiation Effects in CMOS 

- CMOS-RF models 

- CMOS Thermal Effects and Modeling

Ming-Dou Ker (F’08) received the Ph. D. degree from the Institute of Electronics, National Chiao Tung University (NCTU), Hsinchu, Taiwan, in 1993. Now, he is the Distinguished Professor in the Institute of Electronics, National Yang Ming Chiao Tung University (NYCU), Hsinchu, Taiwan, and also the Director of Biomedical Electronics Translational Research Center, NYCU, working on biomedical electronics translational projects. In the technical field of reliability and quality design for semiconductoir devices and integrated circuits, he has authored/co-authored over 600 technical papers in international journals and conferences. He has proposed many solutions to improve the reliability and quality of integrated circuits, which have been granted with hundreds of U.S. patents. He had been invited to teach and/or to consult the reliability and quality design by hundreds of design houses and semiconductor companies in the worldwide IC industry. Some of his inventions or designs had been widely used in the modern IC products and microelectronics systems. His current research interests include the reliability and quality design for nanoelectronics and gigascale systems, as well as the circuits and systems for biomedical applications. Prof. Ker had served as member of the Technical Program Committee and the Session Chair of numerous international conferences for many years, including IEEE Symp. on VLSI Circuits, IEEE International Solid-State Circuits Conference (ISSCC), IEEE International Symp. on Circuits and Systems (ISCAS), and IEEE International Reliability Physic Symp. (IRPS). He ever served as the Distinguished Lecturer in the IEEE Circuits and Systems Society (2006–2007) and in the IEEE Electron Devices Society (2008–2020). He ever served as Associate Editor of IEEE Transactions on VLSI Systems, Associate Editor of IEEE Transactions on Biomedical Circuits and Systems (TBioCAS), and the Guest Editor of ISCAS2019 Special Issue in TBioCAS. He was the Founding President of Taiwan ESD Association, and the 3rd President of Taiwan Engineering Medicine Biology Association. He ever served as the Vice-President of IEEE Taipei Section. Currently, he is serving as the Editor of IEEE Trans. on Device and Materials Reliability, Editor of IEEE Journal of the Electron Devices Society, and a Guest Editor for Frontiers in Neuroscience on the research topic of microelectronic implants for central and peripheral nervous system. Prof. Ker has been a Fellow of the IEEE, since 2008.

Ekkanath Madathil Sankara Narayanan (M’87–SM’00) was born in India, in 1962. He received his B.Sc. and M.Sc. degrees from PSG College of Technology, Coimbatore, India, M.Tech degree from the Indian Institute of Science, Bangalore and his Ph.D. degree from the University of Cambridge, U.K. He was a Maudslay Engineering Research Fellow in Pembroke College, Cambridge and a Research Associate with Engineering Department, Cambridge University during 1992–1994. He was the Director of the Emerging Technologies Research Center, De Montfort University, UK during 1994–2007. He is currently with the Electrical Machines and Drives Research Group at the University of Sheffield in the UK, where he holds the Rolls Royce/Royal Academy of Engineering Chair in Power Electronics Systems and Royal Society Industry Fellowship in Rolls-Royce, UK. His research interests include integrated and discrete power device technologies in Silicon and wide band gap materials, design for manufacturability and compact power converters for automotive/aerospace applications, functional materials, thin film transistors, RF technologies, and technology strategies in microelectronics. He is an author of more than 200 articles and holds twenty five patents, approved or pending approval. He is a Fellow of IET and IOP. He is in the editorial boards of IEEE Transactions on Devices and Materials Reliability and IET Journal of Power Electronics.

Dr. Karumbu Meyyappan is a senior staff engineer at Intel Corporation in Assembly & Test Technology Development division. In his current role, he leads strategic programs related to the areas of test and next generation interconnect solutions. Through his 16 years at Intel he has covered wide areas of reliability physics spanning Silicon back end to board level interconnects, design, predictive modeling, and development of reliability test methods including knowledge based qualification methods. He has published over 30 peer reviewed articles and has 5 patents. He is also a recipient of the Erle Shobert Prize Paper award in 2014. He received his PhD from University of Maryland College Park, MD, USA

Byoung Woon Min (IEEE Senior Member since 2003) received B.S. from Korea University in 1988, M.S. from Korea Advanced Institute of Science Technology in 1990 and Ph.D. from the University of Texas at Austin in 1998. He has been in advanced semiconductor devices technology development and reliability characterization, working with SK Hynix in 1988-1994, Motorola/Freescale/NXP in 1997-2017, and currently with Globalfoundries as Principal Member of Technical Staff and Senior Manager of reliability engineering group since 2017. He authored/co-authored over 30 technical papers and invented/co-invented over 30 patents in various generations of CMOS technology.

Dr. Tan received his Ph.D in Electrical Engineering from the University of Toronto in 1992. He has 10 years of working experiences in reliability in electronic industry (both Singapore and Taiwan) before joining Nanyang Technological University (NTU) as faculty member in 1996 till 2014. He joined Chang Gung University, Taiwan and set up a research Center on Reliability Sciences and Technologies in Taiwan and acts as Center Director. He is Professor in Electronic Department of Chang Gung University, Honorary Chair Professor in Ming Chi University of Technology, Taiwan. He has published 300+ International Journal and Conference papers, and giving 10+ keynote talks and 50+ invited talks in International Conferences and several tutorials in International Conferences. He holds 12 patents and 1 copyright on reliability software. He has written 4 books and 3 book chapters in the field of reliability. He is an Editor of Scientific Report, Nature Publishing Group, an Editor of IEEE TDMR and Series Editor of SpringerBrief in Reliability. He is a member of the advisory panel of Elsevier Publishing Group. He is also in the Technical committee of IEEE IRPS. He is a past chair of IEEE Singapore Section, senior member of IEEE and ASQ, Distinguish Lecturer of IEEE Electronic Device Society on reliability, Founding Chair and current Chair of IEEE Nanotechnology Chapter - Singapore Section, Fellow of Institute of Engineers, Singapore, and Fellow of Singapore Quality Institute. He is the Founding Chair of IEEE International Conference on Nanoelectronics, General Chair of ANQ Congress 2014. He is also the recipient of IEEE Region 10 Outstanding Volunteer Award in 2011. He is Guest Editor of International J. of Nanotechnology, Nano-research letter and Microelectronic Reliability. He is in the reviewer board of several International Journals such as Thin Solid Film, Microelectronic Reliability, various IEEE Transactions, Reliability Engineering and System Safety etc for more than 5 years. He is the only individual recipient of Ishikawa-Kano Quality Award in Singapore since 2014. He is also current active in providing consultation to multi-national corporations on reliability. His research interests include reliability and failure physics modeling of electronic components and systems, finite element modeling of materials degradation, statistical modeling of engineering systems, nano-materials and devices reliability, and prognosis & health management of engineering system. For more detail, please visit www.chermingtan.com

 

Lecture Topics

- Interconnect reliability

- Battery reliability

- System reliability

- LED reliability

- Graphene and reliability

- IoT reliability

- Automotive electronic reliability

 

Mustafa Berke Yelten (Senior Member, IEEE, 2018) received the B.Sc. degree (High Hons.) in electrical engineering from Boğaziçi University, Istanbul, Turkey, in 2006, and the M.Sc. and Ph.D. degrees in electrical engineering from North Carolina State University, Raleigh, NC, USA, in 2008 and 2011, respectively. He was a Quality-Reliability Research Engineer with Intel Corporation, Hillsboro, OR, USA, from 2011 to 2015. Since 2015, he has been with the Electronics and Communications Engineering Department, Istanbul Technical University, Istanbul, where he is currently an Associate Professor. His research interests include the design, optimization, and modeling of nanoscale transistors and the design of analog/RF integrated circuits with a focus on reliability and operation under extreme conditions (cryogenic temperatures, high ionizing radiation, etc.).