Publications and Products Committee
Vice President of Publications and Products
Arokia Nathan - Fellow
Arokia Nathan is currently a Bye-Fellow and Tutor at Darwin College, University of Cambridge, UK. He received his PhD degree in electrical engineering from the University of Alberta, Canada, in 1988. He joined LSI Logic USA, and subsequently, the Institute of Quantum Electronics, ETH Zürich, Switzerland, before joining the Electrical and Computer Engineering Department at the University of Waterloo, Canada. In 2006, he joined the London Centre for Nanotechnology, University College London, UK, as the Sumitomo Chair of Nanotechnology. He moved to Cambridge University in 2011 as the Chair of Photonic Systems and Displays. He has more than 600 publications, including six books, and more that 110 patents and four spin-off companies. He is the co-founder of Cambridge Touch Technologies, UK and VISBAN Networks UK where he is a Director and Chief Technical Officer. He is a Fellow of IEEE and SID, a Distinguished Lecturer of the IEEE Electron Devices Society and Sensor Council, a Chartered Engineer (UK), Fellow of the Institution of Engineering and Technology (UK), and winner of the 2020 IEEE EDS JJ Ebers Award.
- Flexible Electronics
- Oxide Semiconductor Electronics
- Ultralow Power Transistors and Sensor Interfaces
- Active Matrix OLED Displays
- TFT Compact Modeling and Parameter Extraction
- Nanoscale Large Area Electronics
Publications and Products Committee Members
Constantin Bulucea - Distinguished Member of the Technical Staff
Constantin Bulucea (S'69–M'70–SM'88–F'04- LF'13) was born in Râmnicu Vâlcea, Romania. In 1969, he got a one-year government scholarship at the University of California, Berkeley, where he received a M.S. degree in Electrical Engineering. In 1974, he received his Doctor degree in Electronics from the Polytechnic Institute of Bucharest with a thesis on hot-carrier injection in silicon. His original results were communicated at IEDM and published in the old (W. Crawford Dunlap’s) Solid-State Electronics. In Romania, he created the Annual Conference on Semiconductors, now an international IEEE event. His best known contribution from that period is the explanation of Grove’s breakdown voltage collapse in silicon gate-controlled devices as a breakdown-location switching phenomenon, as proven by 2-D computer calculations and measurements. Among his “firsts” from the same time is the direct proof, by DC recordings (rather than by capacitive inferences) of nA-range hot-carrier currents through silicon dioxide.
In 1886, Dr. Bulucea defected to the US, where he first developed a device/process architecture for rugged trench power DMOS transistors, while working for Siliconix (1987-1989). His inventive design became a world standard in the following years. Later on, at National Semiconductor (NS), he was a member of the Fairchild Research Center, then joined the company’s process development group. There, he enjoyed the last years of Silicon Valley's "Happy Scaling" as the architect of several CMOS processes for high-performance analog and mixed-signal applications (2000-2010). In 2011, he became a Distinguished Member of the Technical Staff of Texas Instruments (TI), as a result of TI's acquisition of NSC. Throughout his tenure at NS and TI, he received three Patent of the Year awards, in recognition of the use of his inventions in high-volume manufacturing. He has published over 50 technical articles in major journals and has 70 issued US patents. In 2001, he was elected an Honorary Member of the Romanian Academy and in 2004 became an IEEE Fellow "for contributions to transistor engineering in the area of power electronics".
Dr. Bulucea has been a member of the Technical Committees of the Bipolar Circuits and Technology Meeting (BCTM) and of the VLSI Technology Symposium. Between 2004 and 2012 he was the editor of IEEE Electron Device Letters (EDL) for analog and mixed-signals technology. His IEEE responsibilities include membership in the IEEE/EDS Fellow Evaluation Committee (2018, 2019) and the IEEE/EDS Publications Committee (current).
Joachim N. Burghartz - Fellow
Joachim N. Burghartz is an IEEE Fellow, an IEEE Distinguished Lecturer, recipient of the 2014 EDS J.J. Ebers Award, and has been an ExCom member of the IEEE Electron Devices Society. He received his MS degree from RWTH Aachen in 1982 and his PhD degree in 1987 from the University of Stuttgart, both in Germany. From 1987 thru 1998 he was with the IBM T. J. Watson Research Center in Yorktown Heights, New York, where he was engaged in early development of SiGe HBT technology and later in research on integrated passive components, particularly inductors, for application to monolithic RF circuits. From 1998 until 2005 he was with TU Delft in the Netherlands as a full professor and from 2001 as the Scientific Director of the Delft research institute DIMES. In fall 2005 he moved to Stuttgart, Germany, to head the Institute for Microelectronics Stuttgart (IMS CHIPS). In addition, he is affiliated with the University of Stuttgart as a full professor. More recently, he also became CEO of the IMS Mikro-Nano Produkte GmbH. Dr. Burghartz has published about 350 reviewed articles and holds more than 30 patents. Distinguished Lecture Titles -Hybrid Systems in Foil -Ultra-thin chip technology -GaN technologies for power and RF
-Ultra-Thin Chips – A New Paradigm in Silicon Technology
-Hybrid Systems-in-Foil - Combining the Merits of Thin Chips and of Large-Area Electronics
-GaN-on-Si Technology for Power, RF & Specials
-Marvels of Microelectronic Engineering
Samar K. Saha - Life Fellow
Samar Saha has served as the 2016-2017 President of the IEEE Electron Devices Society (EDS) and currently serving as the Senior Past President and Chairs of the J.J. Ebers Award and Fellow Evaluations Committees. He is the Chief Research Scientist at Prospicient Devices, California, USA and an Adjunct faculty in the Electrical Engineering (EE) department, Santa Clara University, USA. In the past, he has worked in various technical and management positions for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta. In academia, he has worked as a faculty member in the EE departments at Southern Illinois University, Carbondale; Auburn University; the University of Nevada, Las Vegas; and the University of Colorado, Colorado Springs.
Dr. Saha has authored over 100 research papers; two books, entitled, FinFET Devices for VLSI Circuits and Systems (2020) and Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond (2015); one book chapter on Technology Computer-Aided Design (TCAD); and holds 12 US patents. His research interests include exploratory device and process architectures, compact modeling, renewable energy, and R & D management. He is an IEEE Life Fellow and a Fellow of the Institution of Engineering and Technology, UK.
Lecture Topics: (1) Advanced Field-Effect Transistor Device Technologies for Ultra-low Power VLSI Circuits and Systems at Nanometer Nodes; (2) Physics of Integrated Circuit Device Models for VLSI Circuit Design; (3) Thin Film Transistors for Ubiquitous Flexible Electronics; (4) Evolution of Semiconductor Devices Enabling Smart Environments and Integrated Ecosystems.
Electrical Engineering and Computer Sciences
Sayeef Salahuddin is the TSMC Distinguished professor of Electrical Engineering and Computer Sciences at the University of California Berkeley. Salahuddin received his B.Sc.in Electrical and Electronic Engineering from BUET (Bangladesh University of Engineering and Technology) in 2003 and PhD in Electrical and Computer Engineering from Purdue University in 2007. He joined the faculty of Electrical Engineering and Computer Science at University of California, Berkeley in 2008.
His work has focused on conceptualization and exploration of novel device physics for low power electronic and spintronic devices. Salahuddin has championed the concept of using 'interacting systems' for switching, showing fundamental advantage of such systems over the conventional devices in terms of power dissipation. This led to the discovery of Negative Capacitance Transistors that allows for sub kT/q subthreshold operation in transistors.
Salahuddin has received the Presidential Early Career Award for Scientist and Engineers (PECASE), the highest honor bestowed by the US Government on early career scientist and engineers. Salahuddin also received a number of other awards including the NSF CAREER award, the IEEE Nanotechnology Early Career Award, the Young Investigator Awards from the Air Force Office of Scientific Research (AFOSR) and the Army Research Office (ARO) and best paper awards from IEEE Transactions on VLSI Systems and from the VLSI-TSA conference. In 2012, Applied Physics Letters (APL) highlighted two of his papers among 50 most notable papers among all areas published in APL within 2009-2012. Salahuddin also received the George E Smith Award from the IEEE Electron Devices Society.
Salahuddin is a co-director of the Berkeley Device Modeling Center and Berkeley Center for Negative Capacitance Transistors. He is also an associate director for the Applications and Systems-Driven Center for Energy-Efficient Integrated NanoTechnologies (ASCENT), a center jointly funded by the Semiconductor Research Corporation and DARPA within the JUMP initiative.
He served on the editorial board of IEEE Electron Devices Letters (2013-16) and was the chair the IEEE Electron Devices Society committee on Nanotechnology (2014-16).
Salahuddin is a fellow of the IEEE and the APS.
Enrico Sangiorgi - Fellow
Enrico Sangiorgi (F’05) received the Laurea degree in electrical engineering from the University of Bologna, Italy, in 1979. In 1983, 1984, and 1991, he was a Visiting Scientist at the Center for Integrated Systems, Stanford University, Stanford, California, for approximately three years. From 1985 to 2001, he was a consultant at Bell Laboratories, Murray Hill, NJ, where he was a Resident Visitor for more than three years. In 1993, he was appointed Full Professor of Electronics at the University of Udine, Italy, where he started the Electrical Engineering Program and the microelectronic group. In 2002, he joined the University of Bologna, where he is currently in charge of the nanomicro- electronics group at the Campus of Cesena. From 2005 to 2011 he has been the Director of Consorzio Nazionale Interuniversitario per la Nanoeletronica (IU.NET – Italian Universities Nanoelectronic Team), a Legal Consortium grouping nine University Groups active in the field of Nanoelectronics. In 2005 he has been appointed member of the CATRENE Scientific Committee. Since 2006 he is the Vice Chairman of the Scientific Community Council (SCC) of ENIAC (the European Nanoelectronics Initiative Advisory Council). In 2007 he has been appointed member of the Steering Board of AENEAS, the private section of the ENIAC European Technology Platform. In 2008 he has been appointed CEO of Rinnova srl., a new company founded by the University of Bologna aiming to bring research and innovation to SME’s. From 2008 to 2012 he has been the Dean of the Second School of Engineering at the University of Bologna. In 2012 he has been appointed Director of the Department of Electrical and Electronic Engineering – Guglielmo Marconi – of the University of Bologna. Since 2014 he is the Director of the SINANO Institute, International Organization grouping 23 European Institutions active in the field of nanoelectronics.
From 1994 to 2009 he has been Editor of IEEE Electron Device Letters. He has been the Guest Editor of several Special Issues on major scientific journals such as IEEE Transactions on Electron Devices, Solid State Electronics, etc. He has been a member of the Technical Committees of several International Conferences on Electron Devices: IEDM (’91-96; ’04-’06), ESSDERC (‘99-present), INFOS (’95-03), ULIS (’00-‘08), etc. Since 2011 he is a member of the Steering Board of the IEEE Journal of Photovoltaics.
Enrico Sangiorgi is a Fellow of the IEEE, Distinguished Lecturer of the Electron Device Society, he has been Chairman of the Electron Device Society TCAD Technical Committee from 2004 to 2011 member of the Cledo Brunetti Award Committee and Education Award Committee of the EDS. Since 2011 he is elected member of the EDS AdCom. Since 2013 he is a member of the EDS Fellows Evaluation Committee. He has been involved in several European Projects of the 5, 6, and 7 FP with Management Responsibilities, and he has acted as Project Reviewer for the European Commission. The research interests of Enrico Sangiorgi, developed in cooperation with research centers and companies such as Bell Labs., Philips, Infineon Tech., ST Microelectronics, IMEC, and CEA-LETI, include the physics, characterization, modeling, and fabrication of silicon solid-state devices and integrated circuits. In particular he has been working on several aspects of device scaling, its technological, physical, and functional limits, as well as device reliability for silicon CMOS and bipolar transistors. In order to tackle and eventually overcome the hurdles of device scaling, down to the ultimate physical and technological limits, he has devised and developed several original concepts and methods in the characterization and modeling of nanoscale silicon devices. Recently his interests included the physics and modeling of Photo-voltaics devices where he has worked on several aspects of device optimization. Enrico Sangiorgi coauthored 34 papers presented at the International Electron Devices Meeting (IEDM) Conference, and overall more than 250 papers on major journals and conference proceedings.
Lecture Topics: Nanodevices modeling and simulation Photovoltaics devices and technologies Energy Harvesting devices, technologies and systems
Ravi M. Todi
Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.
- MOS Devices and Technology
- About EDS
- Mission, Vision and Field of Interest Statements
- Mission Fund
- Strategic Directions
- EDS Constitution
- EDS Bylaws
- EDS Charters
- EDS Roster
- Governance Meeting
- Board of Governors Election
- ExCom & Elected Members-at-Large
- Standing Committees
- Ad hoc Committees
- Publication Representatives
- IEEE Committee Representatives
- Past Presidents
- EDS Executive Office
- Volunteer Resources
- EDS 50th Anniversary Booklet
- EDS Overview Slides
- EDS Humanitarian Projects
- EDS Society Brief
- 75th Anniversary of the Transistor