Publications and Products Committee

Constantin Bulucea (S'69–M'70–SM'88–F'04- LF'13) was born in Romania, where he received the M.S. and Ph.D. degrees in Electronics from thePolytechnic Institute of Bucharest in 1962 and 1974, respectively. In 1969, hewas granted a one-year government scholarship at the University of California, Berkeley,where he received a M.S. degree in Electrical Engineering. His activeprofessional career spanned 50 years, equally split across the Romanian and USsemiconductor histories.

In Romania, Dr. Bulucea was the scientific director anddirector of the R&D Institute for Electronic Components (ICCE) between 1974and 1986, with assignments of national importance, such as the introduction ofsilicon transistor technology and the development of the process technology forthe Microelectronica MOS/VLSI plant. From that period, his personal legacy includes the creation of theAnnual Conference for Semiconductors (CAS), now an international IEEE event, agraduate course and a book on Linear Integrated Circuits and reference paperson surface breakdown and hot-carrier injection in silicon, originallycommunicated at IEDM and later published in the IEEE Transactions on ElectronDevices and Solid-State Electronics.

In the US, Dr. Bulucea remained on the technical side of thesemiconductors business, so enjoying the last years of Silicon Valley's "HappyScaling". In particular, at NationalSemiconductor, he was the architect of company's 0.25, 0.18, and 0.13 µm CMOSprocesses for analog and mixed-signal applications. Before that, he brought to completionSiliconix's device/process architecture for the next generation of trench powerDMOS transistors, which became an industry standard in the followingyears. He has been active on the R&Darena as a direct contributor and also as the 2003 chairman of the Advanced Devicesand Technologies thrust of the Semiconductor Research Corporation (SRC) and asa member of the Technical Committees of the Bipolar Circuits and TechnologyMeeting (BCTM) and of the VLSI Technology Symposium. Between 2004 and 2012 hewas the editor of IEEE Electron Device Letters (EDL) for analog andmixed-signals technology. Dr. Bulucea has published over 50 technical articlesin international journals and holds 67 US patents with several others pending.

In 2001 Dr. Bulucea was elected an Honorary Member of theRomanian Academy and in 2004 became an IEEE Fellow "for contributions totransistor engineering in the area pf power electronics". In 2011, he became aDistinguished Member of the Technical Staff of Texas Instruments (TI), as aresult of TI's acquisition of National Semiconductor. Dr. Bulucea retired from TI next year, on his72nd birthday, continuing to support company's patent applications that he had authored.

Lecture Topics:

1. “Physics and Technology of Sub-0.25-mm CMOS Devices” (UC Davis Seminar, 2001).

2. “Electronic Properties of Silicon and other <Known Materials>” (Stanford Center for Integrated Research, 2003).

3. “TCAD Revisited – An Engineer’s Point of View” – Excellence in Computer Simulation Symposium of the Network for Computational Nanotechnology (UC Berkeley, 2007).

4. “Devices and Processes for Mixed Signals” (UC San Diego Seminar, 2003 and 2010).

5. Eastern Europe’s Semiconductor Technology - Recollections and Projections (Keynote Address, ESSDERC/ESSCIRC, Bucharest 2013).

Samar Saha has served as the 2016-2017 President of the IEEE Electron Devices Society (EDS) and currently serving as the Senior Past President and Chairs of the J.J. Ebers Award and Fellow Evaluations Committees. He is the Chief Research Scientist at Prospicient Devices, California, USA and an Adjunct faculty in the Electrical Engineering (EE) department, Santa Clara University, USA. In the past, he has worked in various technical and management positions for National Semiconductor, LSI Logic, Texas Instruments, Philips Semiconductors, Silicon Storage Technology, Synopsys, DSM Solutions, Silterra USA, and SuVolta. In academia, he has worked as a faculty member in the EE departments at Southern Illinois University, Carbondale; Auburn University; the University of Nevada, Las Vegas; and the University of Colorado, Colorado Springs.

Dr. Saha has authored over 100 research papers; two books, entitled, FinFET Devices for VLSI Circuits and Systems (2020) and Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond (2015); one book chapter on Technology Computer-Aided Design (TCAD); and holds 12 US patents. His research interests include exploratory device and process architectures, compact modeling, renewable energy, and R & D management. He is an IEEE Life Fellow and a Fellow of the Institution of Engineering and Technology, UK.

Lecture Topics: (1) Advanced Field-Effect Transistor Device Technologies for Ultra-low Power VLSI Circuits and Systems at Nanometer Nodes; (2) Physics of Integrated Circuit Device Models for VLSI Circuit Design; (3) Thin Film Transistors for Ubiquitous Flexible Electronics; (4) Evolution of Semiconductor Devices Enabling Smart Environments and Integrated Ecosystems.

Enrico Sangiorgi (F’05) received the Laurea degree in electrical engineering from the University of Bologna, Italy, in 1979. In 1983, 1984, and 1991, he was a Visiting Scientist at the Center for Integrated Systems, Stanford University, Stanford, California, for approximately three years. From 1985 to 2001, he was a consultant at Bell Laboratories, Murray Hill, NJ, where he was a Resident Visitor for more than three years. In 1993, he was appointed Full Professor of Electronics at the University of Udine, Italy, where he started the Electrical Engineering Program and the microelectronic group. In 2002, he joined the University of Bologna, where he is currently in charge of the nanomicro- electronics group at the Campus of Cesena. From 2005 to 2011 he has been the Director of Consorzio Nazionale Interuniversitario per la Nanoeletronica (IU.NET – Italian Universities Nanoelectronic Team), a Legal Consortium grouping nine University Groups active in the field of Nanoelectronics. In 2005 he has been appointed member of the CATRENE Scientific Committee. Since 2006 he is the Vice Chairman of the Scientific Community Council (SCC) of ENIAC (the European Nanoelectronics Initiative Advisory Council). In 2007 he has been appointed member of the Steering Board of AENEAS, the private section of the ENIAC European Technology Platform. In 2008 he has been appointed CEO of Rinnova srl., a new company founded by the University of Bologna aiming to bring research and innovation to SME’s. From 2008 to 2012 he has been the Dean of the Second School of Engineering at the University of Bologna. In 2012 he has been appointed Director of the Department of Electrical and Electronic Engineering – Guglielmo Marconi – of the University of Bologna. Since 2014 he is the Director of the SINANO Institute, International Organization grouping 23 European Institutions active in the field of nanoelectronics.

From 1994 to 2009 he has been Editor of IEEE Electron Device Letters. He has been the Guest Editor of several Special Issues on major scientific journals such as IEEE Transactions on Electron Devices, Solid State Electronics, etc. He has been a member of the Technical Committees of several International Conferences on Electron Devices: IEDM (’91-96; ’04-’06), ESSDERC (‘99-present), INFOS (’95-03), ULIS (’00-‘08), etc. Since 2011 he is a member of the Steering Board of the IEEE Journal of Photovoltaics.

Enrico Sangiorgi is a Fellow of the IEEE, Distinguished Lecturer of the Electron Device Society, he has been Chairman of the Electron Device Society TCAD Technical Committee from 2004 to 2011 member of the Cledo Brunetti Award Committee and Education Award Committee of the EDS. Since 2011 he is elected member of the EDS AdCom. Since 2013 he is a member of the EDS Fellows Evaluation Committee. He has been involved in several European Projects of the 5, 6, and 7 FP with Management Responsibilities, and he has acted as Project Reviewer for the European Commission. The research interests of Enrico Sangiorgi, developed in cooperation with research centers and companies such as Bell Labs., Philips, Infineon Tech., ST Microelectronics, IMEC, and CEA-LETI, include the physics, characterization, modeling, and fabrication of silicon solid-state devices and integrated circuits. In particular he has been working on several aspects of device scaling, its technological, physical, and functional limits, as well as device reliability for silicon CMOS and bipolar transistors. In order to tackle and eventually overcome the hurdles of device scaling, down to the ultimate physical and technological limits, he has devised and developed several original concepts and methods in the characterization and modeling of nanoscale silicon devices. Recently his interests included the physics and modeling of Photo-voltaics devices where he has worked on several aspects of device optimization. Enrico Sangiorgi coauthored 34 papers presented at the International Electron Devices Meeting (IEDM) Conference, and overall more than 250 papers on major journals and conference proceedings.

Lecture Topics: Nanodevices modeling and simulation Photovoltaics devices and technologies Energy Harvesting devices, technologies and systems

Ravi Todi received his M.S. degree in Electrical and Mechanical Engineering from University of Central Florida in 2004 and 2005 respectively, and his doctoral degree in Electrical Engineering in 2007. His graduate research work was focused on gate stack engineering, with emphasis on binary metal alloys as gate electrode and on high mobility Ge channel devices. In 2007 he started working as Advisory Engineer/Scientist at Semiconductor Research and Development Center at IBM Microelectronics Division focusing on high performance eDRAM integration on 45nm SOI logic platform. Starting in 2010 Ravi was appointed the lead Engineer for 22nm SOI eDRAM development. For his many contributions to the success of eDRAM program at IBM, Ravi was awarded IBM’s Outstanding Technical Achievement Award in 2011. Ravi Joined Qualcomm in 2012, responsible for 20nm technology and product development as part of Qualcomm’s foundry engineering team. Ravi is also responsible for early learning on 16/14 nm FinFet technology nodes. Ravi had authored or co-authored over 50 publications, has several issues US patents and over 25 pending disclosures.

Lecuture Topic

- MOS Devices and Technology